Abstract: A method for forming a semiconductor device is provided. The method includes forming a semiconductor protruding structure over a substrate and surrounding the semiconductor protruding structure with an insulating layer. The method also includes forming a dielectric layer over the insulating layer. The method further includes partially removing the dielectric layer and insulating layer using a planarization process. As a result, topmost surfaces of the semiconductor protruding structure, the insulating layer, and the dielectric layer are substantially level with each other. In addition, the method includes forming a protective layer to cover the topmost surfaces of the dielectric layer. The method includes recessing the insulating layer after the protective layer is formed such that the semiconductor protruding structure and a portion of the dielectric layer protrude from a top surface of a remaining portion of the insulating layer.

Abstract: A method and apparatus for sending subscriber identifiers are disclosed. The method includes: receiving information of a USIM card from a UICC in a cloud card pool over a first communication connection; receiving an identity request from a 5G SA network, wherein the identity request is for requesting acquiring a SUCI; acquiring the SUCI based on the identity request and the information of the USIM card; and sending the SUCI to the 5G SA network, wherein the SUCI is for establishing a second communication connection. The SUCI may be generated at the ME or at the UICC. The first communication connection may be a roaming communication connection and the second communication connection may be a non-roaming communication connection.

Abstract: A method for forming a semiconductor device is provided. The method includes forming a plurality of first channel nanostructures and a plurality of second channel nanostructures in an n-type device region and a p-type device region of a substrate, respectively, and sequentially depositing a gate dielectric layer, an n-type work function metal layer, and a cap layer surrounding each of the first and second channel nanostructures. The cap layer merges in first spaces between adjacent first channel nanostructures and merges in second spaces between adjacent second channel nanostructures. The method further includes selectively removing the cap layer and the n-type work function metal layer in the p-type device region, and depositing a p-type work function metal layer over the cap layer in the n-type device region and the gate dielectric layer in the p-type device region. The p-type work function metal layer merges in the second spaces.

Abstract: A method includes forming a first gate spacer and a second gate spacer on a sidewall of a first gate structure. The first gate spacer is between the second gate spacer and the first gate structure. A first interlayer dielectric (ILD) layer is formed to surround the first gate spacer, the second gate spacer, and the first gate structure. A portion of the second gate spacer and a portion of the first ILD layer are removed simultaneously. A top surface of the second gate spacer is lower than a top surface of the first ILD layer.

Abstract: Disclosed in the present application are a display substrate, a preparation method therefor, and a display device. The display substrate includes a rigid substrate, and a flexible film layer and a display function layer that are sequentially stacked on the rigid substrate. The rigid substrate is provided with an opening at a bending region to expose the flexible film layer in the bending region. The display substrate further includes a first light absorption portion in a display region and is on the side of the display region close to the bending region. The first light absorption portion is on the side of the rigid substrate facing away from the flexible film layer or is between the rigid substrate and the flexible film layer.

Abstract: Provided are an information transmission method and a relevant device. The method includes: a terminal receiving first signaling and second signaling, where the first signaling is configured for indicating a transmission configuration indication (TCI) state, and the second signaling is configured for triggering a first reference signal indicated in the TCI state; and the terminal determining, according to the first signaling, a target channel or a target signal scheduled by the first signaling, where the target channel or the target signal scheduled by the first signaling uses quasi-co-location (QCL) information corresponding to the first reference signal transmitted before a first symbol or QCL information corresponding to the second signaling transmitted before a first symbol.

Abstract: A cartridge assembly may be utilized in combination with an electronic nicotine delivery system for the safe, efficient and cost-effective means for delivering a controlled dose of nicotine to a user on demand. The cartridge assembly includes a reservoir with a material for holding liquid nicotine or a liquid nicotine solution and is constructed from a material that is chemically resistant to nicotine or nicotine solution. The cartridge assembly includes an anti-counterfeit feature to prevent use of an unauthorized cartridge in the electronic nicotine delivery system. The cartridge assembly also includes an anti-reuse feature that precludes reuse of the cartridge assembly once removed from the electronic nicotine delivery system. Essentially, the cartridge assembly is designed for a single use only.

Abstract: A front light module includes a light guide sheet and a light bar. The light guide sheet has two light receiving laterals, a fold line, a first pattern area, and a second pattern area respectively located on two sides of the fold line. One light receiving lateral is protruded to form first taper sets, and the other is protruded to form second taper sets. The second pattern area is superimposed on the first pattern area, and the first and second tapers set are engaged and coplanar to form a light incident surface after folding along the fold line. The light bar provides light toward the light incident surface, the first pattern area is lit by the odd positions of the light bar via the first taper sets, and the second pattern area is lit by the even positions of the light bar via the second taper sets.

Abstract: Some embodiments relate to an integrated chip including a plurality of conductive structures over a substrate. A first dielectric layer is disposed laterally between the conductive structures. A spacer structure is disposed between the first dielectric layer and the plurality of conductive structures. An etch stop layer overlies the plurality of conductive structures. The etch stop layer is disposed on upper surfaces of the spacer structure and the first dielectric layer.

Abstract: A semiconductor device and a method for manufacturing the semiconductor device are provided. The semiconductor device comprises a substrate and a wafer disposed on the substrate. The wafer includes a p-doped layer disposed on the substrate; a first diode disposed on the p-doped layer; a second diode disposed on the p-doped layer; a third diode disposed on the p-doped layer; and a dielectric layer disposed on the substrate and covering the first, second, and third diodes. The first, second, and third diodes are disposed side by side.

Abstract: An optical element and a method for manufacturing the optical element are described. The optical element includes a transparent substrate, an optical layer, and an adhesive layer. The optical layer is located on a surface of the transparent substrate. The optical layer has a first surface and a second surface, which are opposite to each other. The first surface is set with various diffracting optical structures. A refractive index of the optical layer is equal to or greater than 1.4. The adhesive layer is sandwiched between the surface of the transparent substrate and the second surface of the optical layer.

Abstract: Provided are a channel state information transmission method and apparatus, an electronic device, and a storage medium. The channel state information transmission method includes determining configuration information, transmitting the configuration information to a terminal, and receiving channel state information which is reported according to the configuration information by the terminal. The configuration information includes at least one of the size of a subband, a channel state information reporting band, the number R of precoding matrix subbands contained in each subband, or report content of the channel state information. The report content of the channel state information includes a precoding matrix indicator (PMI).

Abstract: Provided are CSI feedback and receiving methods, apparatuses, a device, and a storage medium. The method includes: a terminal determines PMI, the PMI includes at least one of: first base vector information, second base vector information, second coefficient amplitude information or phase information; for one transmission layer, a frequency domain resource in one preset frequency domain unit corresponds to one precoding vector, the precoding vector is a linear combination of first base vectors, and weighting coefficients used in the linear combination of the first base vectors are first coefficients; on multiple frequency domain units contained in a CSI feedback band, a vector composed of first coefficients corresponding to a same first base vector is a linear combination of second base vectors, and weighting coefficients used in the linear combination of the second base vectors are second coefficients; and the terminal feeds back CSI containing the PMI to a base station.

Abstract: Compositions and methods are provided for simple, instrument-free and sensitive methods that enable rapid, point-of-care detection of nucleic acid molecules of interest. This is based on a surprising discovery that the relative efficiencies of amplification and CRISPR-based cleavage and detection can be tuned to favor amplification until sufficient amplified products are generated to enable detection. Example approaches include design of guide RNA and primers to target nonoptimal PAM sequences, or sequence-engineering Cas nucleases to reduce activities informing a ribonucleoprotein with the guide RNA or binding to or cleaving the substrate nucleic acid.

Abstract: Disclosed are a gallium 68 labeled affibody protein PET imaging agent and a use thereof; the imaging agent comprises 68Ga-Z-tri; the 68Ga-Z-tri is obtained by labeling an affibody protein with gallium 68; the affibody protein comprises a PDGFR-? targeting trimer affibody protein Z-tri; and the amino acid sequence listing of the affibody protein Z-tri is as shown in SEQ ID NO. 1. According to the present invention, the utilized PDGFR-? targeting trimer affibody having a unique amino acid sequence has the characteristics of high affinity and high stability compared with a monomer affibody and a dimer affibody, can greatly increase a nuclide labeling rate, and achieves the effectiveness thereof as a PET imaging probe.

Abstract: In some embodiments, the present disclosure relates to an integrated chip that includes a first interconnect dielectric layer arranged over a substrate. An interconnect wire extends through the first interconnect dielectric layer, and a barrier structure is arranged directly over the interconnect wire. The integrated chip further includes an etch stop layer arranged over the barrier structure and surrounds outer sidewalls of the barrier structure. A second interconnect dielectric layer is arranged over the etch stop layer, and an interconnect via extends through the second interconnect dielectric layer, the etch stop layer, and the barrier structure to contact the interconnect wire.

Abstract: A semiconductor image sensor includes a pixel. The pixel includes a first substrate; and a photodiode in the first substrate. The semiconductor image sensor further includes an interconnect structure electrically connected to the pixel. The semiconductor image sensor further includes a reflection structure between the interconnect and the photodiode, wherein the reflection structure is configured to reflect light passing through the photodiode back toward the photodiode.

Abstract: A method of manufacturing a carrying substrate is provided. At least one circuit component is disposed on a first circuit structure. An encapsulation layer is formed on the first circuit structure and encapsulates the circuit component. A second circuit structure is formed on the encapsulation layer and electrically connected to the circuit component. The circuit component is embedded in the encapsulation layer via an existing packaging process. Therefore, the routing area is increased, and a package substrate requiring a large size has a high yield and low manufacturing cost.

Abstract: Provided are a control channel monitoring method and apparatus, an information element transmission method and apparatus, a device, and a storage medium Whether H first-type control channel elements include the same control channel information can be determined according to signaling information and/or a preset rule, where H is a positive integer greater than or equal to 2; and a control channel is monitored according to a determination result.

Abstract: A voltage controlled oscillator (VCO), including: at least one second upper voltage rail; at least one second lower voltage rail; a ring of N cascaded inverters, wherein the set of N cascaded inverters are coupled between the at least one second upper voltage rail and the at least one second lower voltage rail; at least one first frequency band select circuit coupled between first upper voltage rail and the at least one second upper voltage rail; at least one second frequency band select circuit coupled between the at least one second lower voltage rail and first lower voltage rail; at least one first VCO frequency control circuit coupled between the first upper voltage rail and the at least one second upper voltage rail; and at least one second VCO frequency control circuit coupled between the at least one second lower voltage rail and the first lower voltage rail.