Patents by Inventor Hao-Ning Chiang

Hao-Ning Chiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Wafer structure and trimming method thereof
    Patent number: 11682551
    Abstract: A wafer structure and a trimming method thereof are provided. The wafer structure includes a first wafer which includes a front surface, a back surface, and a sidewall connected to the front surface and the back surface. The sidewall of the first wafer includes a plurality of first regions at an edge of the sidewall and the back surface and laterally separated from one another by a pitch. Each of the first regions extends from the back surface toward the front surface and has etching streaks thereon.
    Type: Grant
    Filed: July 27, 2022
    Date of Patent: June 20, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hao-Ning Chiang, Ming-Te Chuang
  • WAFER STRUCTURE AND TRIMMING METHOD THEREOF
    Publication number: 20220367172
    Abstract: A wafer structure and a trimming method thereof are provided. The wafer structure includes a first wafer which includes a front surface, a back surface, and a sidewall connected to the front surface and the back surface. The sidewall of the first wafer includes a plurality of first regions at an edge of the sidewall and the back surface and laterally separated from one another by a pitch. Each of the first regions extends from the back surface toward the front surface and has etching streaks thereon.
    Type: Application
    Filed: July 27, 2022
    Publication date: November 17, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hao-Ning Chiang, Ming-Te Chuang
  • Wafer structure and trimming method thereof
    Patent number: 11456169
    Abstract: A wafer structure and a trimming method thereof are provided. The trimming method includes the following steps. A first wafer having a first surface and a second surface opposite to the first surface is provided. A first pre-trimming mark is formed on the first surface of the first wafer, where forming the first pre-trimming mark includes forming a plurality of recesses arranged as a path along a periphery of the first wafer. The first wafer is trimmed on the first pre-trimming mark and along the path of the first pre-trimming mark to remove a portion of the first wafer and form a trimmed edge having first regions thereon.
    Type: Grant
    Filed: October 14, 2020
    Date of Patent: September 27, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hao-Ning Chiang, Ming-Te Chuang
  • WAFER STRUCTURE AND TRIMMING METHOD THEREOF
    Publication number: 20210028005
    Abstract: A wafer structure and a trimming method thereof are provided. The trimming method includes the following steps. A first wafer having a first surface and a second surface opposite to the first surface is provided. A first pre-trimming mark is formed on the first surface of the first wafer, where forming the first pre-trimming mark includes forming a plurality of recesses arranged as a path along a periphery of the first wafer. The first wafer is trimmed on the first pre-trimming mark and along the path of the first pre-trimming mark to remove a portion of the first wafer and form a trimmed edge having first regions thereon.
    Type: Application
    Filed: October 14, 2020
    Publication date: January 28, 2021
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hao-Ning Chiang, Ming-Te Chuang
  • Wafer structure and trimming method thereof
    Patent number: 10818488
    Abstract: A wafer structure and a trimming method thereof are provided. The trimming method includes the following steps. A first wafer having a first surface and a second surface opposite to the first surface is provided. A first pre-trimming mark is formed on the first surface of the first wafer, wherein forming the first pre-trimming mark includes forming a plurality of recesses arranged as a path along a periphery of the first wafer. The first wafer is trimmed on the first pre-trimming mark and along the path of the first pre-trimming mark to remove a portion of the first wafer and form a trimmed edge having first regions thereon.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: October 27, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hao-Ning Chiang, Ming-Te Chuang
  • WAFER STRUCTURE AND TRIMMING METHOD THEREOF
    Publication number: 20190148130
    Abstract: A wafer structure and a trimming method thereof are provided. The trimming method includes the following steps. A first wafer having a first surface and a second surface opposite to the first surface is provided. A first pre-trimming mark is formed on the first surface of the first wafer, wherein forming the first pre-trimming mark includes forming a plurality of recesses arranged as a path along a periphery of the first wafer. The first wafer is trimmed on the first pre-trimming mark and along the path of the first pre-trimming mark to remove a portion of the first wafer and form a trimmed edge having first regions thereon.
    Type: Application
    Filed: October 25, 2018
    Publication date: May 16, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hao-Ning Chiang, Ming-Te Chuang