Patents by Inventor HAO-YI WEI

HAO-YI WEI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11936379
    Abstract: Embodiments include a memory device with an improved calibration circuit. Memory device input/output pins include delay lines for adjusting the delay in each memory input/output signal path. The delay adjustment circuitry includes digital delay lines for adjusting this delay. Further, each digital delay line is calibrated via a digital delay line locked loop which enables adjustment of the delay through the digital delay line in fractions of a unit interval across variations due to differences in manufacturing process, operating voltage, and operating temperature. The disclosed techniques calibrate the digital delay lines by measuring both the high phase and the low phase of the clock signal. As a result, the disclosed techniques compensate for duty cycle distortion by combining the calibration results from both phases of the clock signal. The disclosed techniques thereby result in lower calibration error relative to approaches that measure only one phase of the clock signal.
    Type: Grant
    Filed: June 15, 2022
    Date of Patent: March 19, 2024
    Assignee: NVIDIA CORPORATION
    Inventors: Ish Chadha, Virendra Kumar, Abhijith Kashyap, Vipul Katyal, Hao-Yi Wei
  • Patent number: 11700698
    Abstract: A method for manufacturing a circuit board comprises: a first single-sided board and an insulating structure are provided. The first single-sided board is pressed to the insulating structure and covers opposite side surfaces of the insulating structure to form a first laminated board. A second single-sided board and a third single-sided board are provided. The second single-sided board is pressed to the third single-sided board and covers opposite side walls of the third single-sided board to form a second laminated board. An inner wiring layer is formed by the second laminated board. The second laminated board with the inner wiring layer and the first laminated board are pressed to form an intermediate structure. Outer wiring layers are formed by the intermediate structure. Covering films are formed on surfaces of the outer wiring layers. Electromagnetic interference shielding layers are formed on the covering films.
    Type: Grant
    Filed: March 4, 2022
    Date of Patent: July 11, 2023
    Assignees: HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd., Avary Holding (Shenzhen) Co., Limited.
    Inventors: Hao-Yi Wei, Yan-Lu Li
  • Publication number: 20230171877
    Abstract: A circuit board includes a dielectric substrate, a signal line and a pair of ground wires. The dielectric substrate includes a base and an elevated platform protruding from an upper surface of the base. The signal line is conformally disposed on the dielectric substrate and includes a first segment disposed on an upper surface of the elevated platform, a second segment extending on the upper surface of the base, and a third segment disposed on a sidewall of the elevated platform and connecting the first segment and the second segment. The pair of ground wires are disposed on the dielectric substrate and are spaced apart from the signal line. A projection of the second segment of the signal line on the upper surface of the base partly overlaps projections of the pair of ground wires on the upper surface of the base.
    Type: Application
    Filed: December 29, 2021
    Publication date: June 1, 2023
    Inventors: Hao-Yi WEI, Childe ZHU, Yan-Lu LI
  • Publication number: 20220192034
    Abstract: A method for manufacturing a circuit board comprises: a first single-sided board and an insulating structure are provided. The first single-sided board is pressed to the insulating structure and covers opposite side surfaces of the insulating structure to form a first laminated board. A second single-sided board and a third single-sided board are provided. The second single-sided board is pressed to the third single-sided board and covers opposite side walls of the third single-sided board to form a second laminated board. An inner wiring layer is formed by the second laminated board. The second laminated board with the inner wiring layer and the first laminated board are pressed to form an intermediate structure. Outer wiring layers are formed by the intermediate structure. Covering films are formed on surfaces of the outer wiring layers. Electromagnetic interference shielding layers are formed on the covering films.
    Type: Application
    Filed: March 4, 2022
    Publication date: June 16, 2022
    Inventors: HAO-YI WEI, YAN-LU LI
  • Patent number: 11304312
    Abstract: A method for manufacturing a circuit board comprises: a first single-sided board and an insulating structure are provided. The first single-sided board is pressed to the insulating structure and covers opposite side surfaces of the insulating structure to form a first laminated board. A second single-sided board and a third single-sided board are provided. The second single-sided board is pressed to the third single-sided board and covers opposite side walls of the third single-sided board to form a second laminated board. An inner wiring layer is formed by the second laminated board. The second laminated board with the inner wiring layer and the first laminated board are pressed to form an intermediate structure. Outer wiring layers are formed by the intermediate structure. Covering films are formed on surfaces of the outer wiring layers. Electromagnetic interference shielding layers are formed on the covering films.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: April 12, 2022
    Assignees: HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd., Avary Holding (Shenzhen) Co., Limited.
    Inventors: Hao-Yi Wei, Yan-Lu Li
  • Publication number: 20210368633
    Abstract: A method for manufacturing a circuit board comprises: a first single-sided board and an insulating structure are provided. The first single-sided board is pressed to the insulating structure and covers opposite side surfaces of the insulating structure to form a first laminated board. A second single-sided board and a third single-sided board are provided. The second single-sided board is pressed to the third single-sided board and covers opposite side walls of the third single-sided board to form a second laminated board. An inner wiring layer is formed by the second laminated board. The second laminated board with the inner wiring layer and the first laminated board are pressed to form an intermediate structure. Outer wiring layers are formed by the intermediate structure. Covering films are formed on surfaces of the outer wiring layers. Electromagnetic interference shielding layers are formed on the covering films.
    Type: Application
    Filed: May 29, 2020
    Publication date: November 25, 2021
    Inventors: HAO-YI WEI, YAN-LU LI