Patents by Inventor Haoran Jiang

Haoran Jiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240171128
    Abstract: Low noise amplifiers (LNAs) with low noise figure are provided. In certain embodiments, an LNA includes a single-ended LNA stage including an input for receiving a single-ended input signal from an antenna and an output for providing a single-ended amplified signal, a balun for converting the single-ended amplified signal to a differential signal, and a variable gain differential amplification stage for amplifying the differential signal from the balun. Implementing the LNA in this manner provides low noise figure, high gain, flexibility in controlling gain, and less sensitivity to ground/supply impedance.
    Type: Application
    Filed: January 26, 2024
    Publication date: May 23, 2024
    Inventors: Sanjeev Jain, Haoran Yu, Nan Sen Lin, Gregory Edward Babcock, Kai Jiang, Hassan Sarbishaei
  • Patent number: 11923808
    Abstract: Low noise amplifiers (LNAs) with low noise figure are provided. In certain embodiments, an LNA includes a single-ended LNA stage including an input for receiving a single-ended input signal from an antenna and an output for providing a single-ended amplified signal, a balun for converting the single-ended amplified signal to a differential signal, and a variable gain differential amplification stage for amplifying the differential signal from the balun. Implementing the LNA in this manner provides low noise figure, high gain, flexibility in controlling gain, and less sensitivity to ground/supply impedance.
    Type: Grant
    Filed: January 23, 2023
    Date of Patent: March 5, 2024
    Assignee: Skyworks Solutions, Inc.
    Inventors: Sanjeev Jain, Haoran Yu, Nan Sen Lin, Gregory Edward Babcock, Kai Jiang, Hassan Sarbishaei
  • Patent number: 11924080
    Abstract: Some embodiments provide a method of identifying packet latency in a software defined datacenter (SDDC) that includes a network and multiple host computers executing multiple machines. At a first host computer, the method identifies and stores (i) multiple time values associated with several packet processing operations performed on a particular packet sent by a first machine executing on the first host computer, and (ii) a time value associated with packet transmission through the SDDC network from the first host computer to a second host computer that is a destination of the particular packet. The method provides the stored time values to a set of one or more controllers to process to identify multiple latencies experienced by multiple packets processed in the SDDC.
    Type: Grant
    Filed: March 21, 2022
    Date of Patent: March 5, 2024
    Assignee: VMware LLC
    Inventors: Haoran Chen, Ming Shu, Xi Cheng, Feng Pan, Xiaoyan Jin, Caixia Jiang, Qiong Wang, Qi Wu
  • Publication number: 20210342138
    Abstract: A device for recognizing an application in a mobile terminal includes: a coprocessor, configured to identify an image obtained by a signal processing device to obtain a first image category, and determine a first application corresponding to the first image category; and a main processor, configured to receive an identifier of the first application from the coprocessor, and activate the first application or prompt a user to download the first application. The device can relatively accurately determine, based on an image from an image sensor, an application that the user may want to use, and activate the application.
    Type: Application
    Filed: June 17, 2021
    Publication date: November 4, 2021
    Inventors: Jingrui GUO, Lingyan LI, Haoran JIANG, Jiangxiong LI
  • Patent number: 11121019
    Abstract: An assembly for clamping semiconductor wafers includes a plate and an electrostatic chuck mounted on the plate. A plurality of slots extends between respective portions of the electrostatic chuck to receive arms of an end-effector of a wafer-handler. The arms of the end-effector support semiconductor wafers being placed onto and removed from the electrostatic chuck.
    Type: Grant
    Filed: October 5, 2018
    Date of Patent: September 14, 2021
    Assignee: KLA Corporation
    Inventors: Aviv Balan, Haoran Jiang
  • Publication number: 20190385882
    Abstract: An assembly for clamping semiconductor wafers includes a plate and an electrostatic chuck mounted on the plate. A plurality of slots extends between respective portions of the electrostatic chuck to receive arms of an end-effector of a wafer-handler. The arms of the end-effector support semiconductor wafers being placed onto and removed from the electrostatic chuck.
    Type: Application
    Filed: October 5, 2018
    Publication date: December 19, 2019
    Inventors: Aviv Balan, Haoran Jiang