Abstract: An integrated circuit chip stack includes a stack of chip packages mounted on a substrate. Each chip package includes a plastic packaged chip mounted within a central aperture in a thin, planar frame by soldering leads at opposite ends of the plastic package to conductive pads on an upper surface of the frame adjacent the central aperture. Conductive traces and vias couple the conductive pads to other conductive pads on upper and lower surfaces of the frame adjacent outer edges thereof. The conductive pads adjacent the outer edges are soldered to the conductive pads of adjacent chip packages by dipping the edges of an assembled stack of the chip packages in solder. The chip stack thus formed is mounted on a substrate. Each chip package can be individually addressed by the substrate, such as to enable the chip therein, using a stair step arrangement of the conductive pads in which the pads on the opposite surfaces of each frame are coupled in offset fashion by vias extending through the frame.

Abstract: A screen printing arrangement is disclosed including a mesh or screen attached to a frame, the screen having a pattern area defined therein. Strips of thin rectangularly shaped material are glued to the bottom surface of the screen, outside the pattern area. During the screen printing process, the strips keep the screen mesh and pattern from undesirably stretching. Fine conductor lines or conductor line spacings on the order of 5 mils may be achieved.