Abstract: Forming a thin film acoustic device by patterning a layer of non-conducting material on a first side of a substrate to expose a portion of the first substrate side; depositing layers of conducting material on the layer of non-conducting material and the exposed portion of the first substrate side; depositing a layer of piezoelectric material on the layers of conducting material; depositing and patterning additional layers of material on the layer of piezoelectric material to form a first device electrode; depositing and patterning a masking layer on a second side of the substrate to expose a portion of the second substrate side; etching away the exposed substrate portion to expose the patterned layer of non-conducting material and a portion of the layers of conducting material; and etching away the exposed portion of the layers of conducting material to form a second device electrode.

Abstract: Methods for fabricating robust films across a patterned underlying layer's edges or steps are disclosed. The novel methods diminish the negative effects of electrode steps or edges on the integrity of a membrane. Thus, the methods are particularly applicable to membrane release technology. The height of the step or edge is eliminated or reduced to increase the mechanical integrity of the film.

Abstract: Methods for fabricating robust films across a patterned underlying layer's edges or steps are disclosed. The novel methods diminish the negative effects of electrode steps or edges on the integrity of a membrane. Thus, the methods are particularly applicable to membrane release technology. The height of the step or edge is eliminated or reduced to increase the mechanical integrity of the film.

Abstract: Methods for fabricating robust films across a patterned underlying layer's edges or steps are disclosed. The novel methods diminish the negative effects of electrode steps or edges on the integrity of a membrane. Thus, the methods are particularly applicable to membrane release technology. The height of the step or edge is eliminated or reduced to increase the mechanical integrity of the film.

Abstract: Methods for fabricating robust films across a patterned underlying layer's edges or steps are disclosed. The novel methods diminish the negative effects of electrode steps or edges on the integrity of a membrane. Thus, the methods are particularly applicable to membrane release technology. The height of the step or edge is eliminated or reduced to increase the mechanical integrity of the film.

Abstract: A method for making a radio frequency (RF) component includes forming a dielectric layer on a semiconductor substrate and forming and patterning a conductive layer on the dielectric layer to define the RF component. The dielectric layer may include SiN, the conductive layer may include aluminum, and the semiconductor substrate may include silicon, for example. At least one opening may be formed through the RF component at least to the semiconductor substrate. Moreover, the at least one opening may either extend into the semiconductor substrate or substantially terminate at a surface of the semiconductor substrate. The RF component may then be released from the semiconductor substrate by exposing the semiconductor substrate to an etchant passing through the at least one opening to the semiconductor substrate. Releasing the RF component may include exposing the semiconductor substrate to a dry etchant, such as XeF2, for example.

Abstract: A method for making a radio frequency (RF) component includes forming a dielectric layer on a semiconductor substrate and forming and patterning a conductive layer on the dielectric layer to define the RF component. The dielectric layer may include SiN, the conductive layer may include aluminum, and the semiconductor substrate may include silicon, for example. At least one opening may be formed through the RF component at least to the semiconductor substrate. Moreover, the at least one opening may either extend into the semiconductor substrate or substantially terminate at a surface of the semiconductor substrate. The RF component may then be released from the semiconductor substrate by exposing the semiconductor substrate to an etchant passing through the at least one opening to the semiconductor substrate. Releasing the RF component may include exposing the semiconductor substrate to a dry etchant, such as XeF2, for example.

Abstract: A reflector stack or acoustic mirror arrangement for an acoustic device is described which may attain the highest possible impedance mismatch between alternating higher and lower impedance reflecting layers of the stack, so as to maximize bandwidth. The arrangement may also reduce manufacturing costs by requiring fewer layers for the device, as compared to conventional acoustic mirrors. The thinner reflecting stack is accordingly fabricated in reduced time to lower cost, by incorporating materials providing a larger acoustic impedance mismatch than those currently obtainable. The bandwidth of the resulting acoustic resonator device may be widened, particularly when a low density material such as aerogel, CVD SiO2 and/or sputter deposited SiO2 is applied as topmost layer in the reflector stack/acoustic mirror arrangement of the device.

Abstract: Methods for fabricating robust films across a patterned underlying layer's edges or steps are disclosed. The novel methods diminish the negative effects of electrode steps or edges on the integrity of a membrane. Thus, the methods are particularly applicable to membrane release technology. The height of the step or edge is eliminated or reduced to increase the mechanical integrity of the film.

Abstract: A new bulk resonator may be fabricated by a process that is readily incorporated in the traditional fabrication techniques used in the fabrication of monolithic integrated circuits on a wafer. The resonator is decoupled from the wafer by a cavity etched under the resonator using selective etching through front openings (vias) in a resonator membrane. In a typical structure the resonator is formed over a silicon wafer by first forming a first electrode, coating a piezoelectric layer over both the electrode and the wafer surface and forming a second electrode opposite the first on the surface of the piezoelectric layer. After this structure is complete, a number of vias are etched in the piezoelectric layer exposing the surface under the piezoelectric layer to a selective etching process that selectively attacks the surface below the piezoelectric layer creating a cavity under the resonator.

Abstract: Highly oriented thin films exhibiting good piezoelectric effects are formed in a reaction chamber. This is done by bombarding a target comprising a piezoelectric material. Dislodged particles from the target are ionized and then electrostatically attracted to the surface of a substrate where they are neutralized and deposited in an ordered way.