Abstract: A wideband digital discriminator for demodulating an FM signal is disclosed. An incoming FM signal cycles a counter through a series of sequential nonambiuous cyclical states. A timer is provided for producing a reference signal having a known relationship to the center frequency of the FM signal. First and second latches, synchronous with the timing means, are provided for sampling and storing information about the present and immediately preceding output states of the counter. A detector, operated synchronously with the reference signal, detects differences in magnitude and direction between the present and immediately preceding sampled states of the counter and generates an output signal when a state difference is detected. The output signal can be digitally processed or integrated over time to provide an analog discriminator output.

Abstract: A digital frequency deviation meter for measuring the deviation of an FM signal from a center frequency is disclosed. An incoming FM signal is applied to a counter which is cycled through a series of sequential nonambiguous cyclical states. A storage memory, actuated at a center frequency produced by a timer, is provided for storing information about the present and immediately preceding sampled states of the counter. Operating synchronously with the timer is a detector that responds to the differences in magnitude and direction between the present and immediately preceding sampled states of the counter and generates a pulse when a state difference is detected. A frequency counter counts the pulses which are output at a rate proportional to the frequency deviation. To maintain the timer at center frequency a phase lock loop is provided.

Abstract: A solid state digital running time indicator is energized from the same power source supplying energy to a monitored event. A device for detecting when the power is on initiates a signal to timing circuitry for generating clock pulse signals and control timing signals. In response to an initial timing signal, a memory element reads the information from memory into a counter chain. The clock pulse signals are applied to the counter chain for counting up in predetermined increments of time from the number that is initially loaded into the counter chain from the memory element. Control circuitry writes the contents of the counter chain into the memory element after each predetermined increment of time. The total accumulated running time present in the counter chain is applied to drive and display circuitry for providing a visual indication of the running time of the event being monitored.

Abstract: A radio navigation, position locating and signaling arrangement employs three operative channels per vehicle for receiving three commercial radio transmissions. Each channel includes feedback circuitry for maintaining a constant phase relationship between a replica of the received broadcast carrier and a reference oscillation, both reduced in frequency. An accumulator in each channel records the number of pulses added and/or deleted from the reference pulse train to provide a measure of the radial distance travelled by a vehicle with respect to the corresponding fixed radio transmitters. Common central station equipment processes the reported vehicle accumulated coordinate pulse counts, and corrects such vehicle coordinate fixing information for frequency error in the non-cooperative commercial transmissions and in the vehicle mounted local reference oscillations.