Patents by Inventor Harry Q. Pon

Harry Q. Pon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8897831
    Abstract: A wireless device, such as a laptop computer or a cellular phone, may contain confidential information which may be secured by an internal security system. When the device is stolen, the user can provide a portion of a kill code to a wireless service provider. The wireless service provider provides its own portion of the kill code and combines it with the user's supplied code. Then, the service provider may transmit the combined kill code to the wireless device. Upon receipt, the wireless device may erase all confidential information on the device. In other embodiments, it may erase any unlocked block of memory. As still another alternative, the system may also, upon receipt of the combined kill code, disable the operating system.
    Type: Grant
    Filed: December 15, 2009
    Date of Patent: November 25, 2014
    Assignee: Intel Corporation
    Inventors: Harry Q. Pon, Shawn C. Sackman
  • Publication number: 20120060224
    Abstract: A wireless device, such as a laptop computer or a cellular phone, may contain confidential information which may be secured by an internal security system. When the device is stolen, the user can provide a portion of a kill code to a wireless service provider. The wireless service provider provides its own portion of the kill code and combines it with the user's supplied code. Then, the service provider may transmit the combined kill code to the wireless device. Upon receipt, the wireless device may erase all confidential information on the device. In other embodiments, it may erase any unlocked block of memory. As still another alternative, the system may also, upon receipt of the combined kill code, disable the operating system.
    Type: Application
    Filed: November 10, 2011
    Publication date: March 8, 2012
    Inventors: Harry Q. Pon, Shawn C. Sackman
  • Patent number: 8078216
    Abstract: A wireless device, such as a laptop computer or a cellular phone, may contain confidential information which may be secured by an internal security system. When the device is stolen, the user can provide a portion of a kill code to a wireless service provider. The wireless service provider provides its own portion of the kill code and combines it with the user's supplied code. Then, the service provider may transmit the combined kill code to the wireless device. Upon receipt, the wireless device may erase all confidential information on the device. In other embodiments, it may erase any unlocked block of memory. As still another alternative, the system may also, upon receipt of the combined kill code, disable the operating system.
    Type: Grant
    Filed: October 13, 2004
    Date of Patent: December 13, 2011
    Assignee: Intel Corporation
    Inventors: Harry Q. Pon, Shawn C. Sackman
  • Publication number: 20100099379
    Abstract: A wireless device, such as a laptop computer or a cellular phone, may contain confidential information which may be secured by an internal security system. When the device is stolen, the user can provide a portion of a kill code to a wireless service provider. The wireless service provider provides its own portion of the kill code and combines it with the user's supplied code. Then, the service provider may transmit the combined kill code to the wireless device. Upon receipt, the wireless device may erase all confidential information on the device. In other embodiments, it may erase any unlocked block of memory. As still another alternative, the system may also, upon receipt of the combined kill code, disable the operating system.
    Type: Application
    Filed: December 15, 2009
    Publication date: April 22, 2010
    Inventors: Harry Q. Pon, Shawn C. Sackman
  • Patent number: 7390736
    Abstract: A circuit element that may generate or be affected by noise or electromagnetic interference may be substantially surrounded by one or more encircling plugs. The encircling plug may be closed by an interconnection layer. The plug may be grounded to reduce the electromagnetic interference or noise generated by or coupled to said passive circuit element.
    Type: Grant
    Filed: September 10, 2004
    Date of Patent: June 24, 2008
    Assignee: Intel Corporation
    Inventor: Harry Q. Pon
  • Patent number: 6894398
    Abstract: An insulated bond wire to connect integrated circuits to each other or to substrates. Insulated bond wires may allow bond wires connecting integrated circuits and substrates to cross without shorting. Because bond wires may be crossed, integrated circuit assemblies with crossing bond wires may not need to be redesigned to avoid the wire crossings. In addition, insulated bond wires may also allow for closer spacing between bond wires due to reduced electronic interference between the wires. Closer spacing may allow for more input and output ports on an integrated circuit and thus increase its functionality.
    Type: Grant
    Filed: March 30, 2001
    Date of Patent: May 17, 2005
    Assignee: Intel Corporation
    Inventor: Harry Q. Pon
  • Patent number: 6800918
    Abstract: A circuit element that may generate or be affected by noise or electromagnetic interference may be substantially surrounded by one or more encircling plugs. The encircling plug may be closed by an interconnection layer. The plug may be grounded to reduce the electromagnetic interference or noise generated by or coupled to said passive circuit element.
    Type: Grant
    Filed: April 18, 2001
    Date of Patent: October 5, 2004
    Assignee: Intel Corporation
    Inventor: Harry Q. Pon
  • Publication number: 20030218896
    Abstract: A memory includes a cross point memory and a second memory. The cross point memory includes a memory element disposed at a cross point. The memory element exists in a plurality of states. The second memory includes a second memory element that exists in a plurality of states.
    Type: Application
    Filed: May 22, 2002
    Publication date: November 27, 2003
    Inventors: Harry Q. Pon, Mark D. Winston
  • Patent number: 6628552
    Abstract: A low-power input buffer for a nonvolatile writeable memory is described. The low-power input buffer accepts input signals having one of a number of pairs of logic levels. The low-power input buffer provides output signals having a pair of logic levels that may differ from the logic levels of the input signal. The low-power input buffer comprises an inverter that receives an input signal, a circuit with a relatively low voltage drop, and a feedback pull-up device. The circuit with the relatively low voltage drop causes the low-power input buffer to accept input signals having one pair of logic levels while providing signals that may have a different pair of logic levels. The feedback pull-up device prevents the low-power input buffer from drawing leakage current. The low-power input buffer is coupled to the nonvolatile writeable memory and coupled to the same power supply output as the nonvolatile writeable memory.
    Type: Grant
    Filed: April 11, 1997
    Date of Patent: September 30, 2003
    Assignee: Intel Corporation
    Inventors: Robert E. Larsen, Harry Q. Pon
  • Publication number: 20020155655
    Abstract: A circuit element that may generate or be affected by noise or electromagnetic interference may be substantially surrounded by one or more encircling plugs. The encircling plug may be closed by an interconnection layer. The plug may be grounded to reduce the electromagnetic interference or noise generated by or coupled to said passive circuit element.
    Type: Application
    Filed: April 18, 2001
    Publication date: October 24, 2002
    Inventor: Harry Q. Pon
  • Publication number: 20020140112
    Abstract: An insulated bond wire to connect integrated circuits to each other or to substrates. Insulated bond wires may allow bond wires connecting integrated circuits and substrates to cross without shorting. Because bond wires may be crossed, integrated circuit assemblies with crossing bond wires may not need to be redesigned to avoid the wire crossings. In addition, insulated bond wires may also allow for closer spacing between bond wires due to reduced electronic interference between the wires. Closer spacing may allow for more input and output ports on an integrated circuit and thus increase its functionality.
    Type: Application
    Filed: March 30, 2001
    Publication date: October 3, 2002
    Inventor: Harry Q. Pon
  • Patent number: 5933026
    Abstract: A low-power interface for nonvolatile writeable memory is described. The interface includes an input buffer and an output buffer. The input buffer receives input signals having one of a number of pairs of logic levels. The input buffer is coupled to the nonvolatile writeable memory and coupled to the same power supply as the nonvolatile writeable memory. The input buffer translates the input signals received to the signal level used by the nonvolatile writeable memory. The output buffer is coupled to the nonvolatile writeable memory and is coupled to a different power supply from the input buffer and the nonvolatile writeable memory. The output buffer translates the signals received from the nonvolatile writeable memory to the same signal levels as the input signal. The input buffer and output buffer utilize input/output signals having logic levels compatible with complementary metal-oxide semiconductor (CMOS) technology.
    Type: Grant
    Filed: April 11, 1997
    Date of Patent: August 3, 1999
    Assignee: Intel Corporation
    Inventors: Robert E. Larsen, Harry Q. Pon, Sanjay Talreja, Marcus E. Landgraf, Ranjeet Alexis
  • Patent number: 5903500
    Abstract: A high-speed output buffer for a nonvolatile writeable memory is described. The high-speed output buffer receives signals from the nonvolatile writeable memory having a pair of logic levels. The high-speed output buffer provides output signals having a pair of logic levels that may differ from the pair of logic levels of the signal received from the nonvolatile writeable memory. The high-speed output buffer comprises two inverters, a pull-up device, and a circuit with a relatively low voltage drop. The circuit with the relatively low voltage drop causes the high-speed output buffer to receive signals having one pair of logic levels while providing high-speed output signals having another pair of logic levels which may differ from the pair of logic levels of the received signal. The high-speed output buffer is coupled to a different power supply output from the nonvolatile writeable memory.
    Type: Grant
    Filed: April 11, 1997
    Date of Patent: May 11, 1999
    Assignee: Intel Corporation
    Inventors: Wai Keung Tsang, Harry Q. Pon, Robert E. Larsen
  • Patent number: 5805517
    Abstract: An address transition detector receives one or more address signals. The address transition detector provides a transition detection signal in response to a transition of at least one of the address signals. A pulse generator is coupled to receive the transition detection signal and an environmental input. The pulse generator provides a control signal having a delay based upon an environmental input. The environmental control input may be based upon variables such as temperature, supply voltage, or process skew.
    Type: Grant
    Filed: December 27, 1996
    Date of Patent: September 8, 1998
    Assignee: Intel Corporation
    Inventor: Harry Q. Pon