Patents by Inventor Hartmut B. Brinkhus

Hartmut B. Brinkhus has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040199674
    Abstract: A universal, programmable interface circuit which contains a plurality of controllable switches, a plurality of controllable multiplexers, at least one analog/digital converter, and at least one digital/analog converter. These components are activated, deactivated, or changed in their operating or switching states by means of control signals, wherein different functions can be assigned to each bidirectional input connection. Thus, each input connection can have a plurality of digital or analog functions for bidirectional exchange of data, measurement values, control signals, or the like between a computer and instruments of a technical process.
    Type: Application
    Filed: February 24, 2004
    Publication date: October 7, 2004
    Inventor: Hartmut B. Brinkhus
  • Patent number: 6516377
    Abstract: In an electronic system, an arithmetic device is provided between successive bus terminals or between successive modules, respectively, with an identification signal applied to a bus input that is routed from one bus terminal to the next bus terminal until the identification signal has passed through all bus terminals in order to identify the modules. The identification signal is subjected to an arithmetic operation and consequently changed in each arithmetic device before it is forwarded to the next bus terminal, wherein the “results of the operations” are used for identifying the individual bus terminals and the individual modules, respectively.
    Type: Grant
    Filed: December 10, 1999
    Date of Patent: February 4, 2003
    Inventor: Hartmut B. Brinkhus
  • Patent number: 6425031
    Abstract: To transfer information between modules which are connected to a common bus, the module that wants to send information sends a request signal via a common bus request line. The module (bus master) which controls the bus activities, receives this signal, sends a command via the bus to all bus users, and thus starts a cycle of clock pulses. A particular clock pulse within a cycle is assigned to each bus user, during which it can send or receive one signal each along one or several predefined bus lines (FIG. 1).
    Type: Grant
    Filed: November 5, 1999
    Date of Patent: July 23, 2002
    Inventor: Hartmut B. Brinkhus