Patents by Inventor Haruhiko Okazaki

Haruhiko Okazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030209720
    Abstract: An InGaN active layer is formed on a sapphire substrate. A p-side electrode is formed on the InGaN active layer to supply an electric current to this InGaN active layer. The p-side electrode includes {circle over (1)} an Ni layer for forming an ohmic contact with a p-GaN layer, {circle over (2)} an Mo layer having a barrier function of preventing diffusion of impurities, {circle over (3)} an Al layer as a high-reflection electrode, {circle over (4)} a Ti layer having a barrier function, and {circle over (5)} an Au layer for improving the contact with a submount on a lead frame. The p-side electrode having this five-layered structure realizes an ohmic contact and high reflectance at the same time.
    Type: Application
    Filed: April 17, 2003
    Publication date: November 13, 2003
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Haruhiko Okazaki, Hideto Sugawara
  • Patent number: 6586874
    Abstract: An image display device including a light emission section which emits light to an intensity adjusting section and a wavelength conversion section which change the intensity and wavelength of the emitted light. Phosphors and phosphor like materials are employed in wavelength conversion and a liquid crystal is employed for the light adjustment. The light emission device may include plural semiconductor light emitting elements having a different wavelength ranges such as diodes stacked in a compact and predetermined order such that wavelengths of light from each diode are emitted from the light emitting elements.
    Type: Grant
    Filed: May 18, 1998
    Date of Patent: July 1, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Satoshi Komoto, Masayuki Ishikawa, Tadashi Umeji, Kuniaki Konno, Koichi Nitta, Haruhiko Okazaki
  • Publication number: 20030062530
    Abstract: Efficiency of leading out light released from an active layer, i.e. the external quantum efficiency, can be improved remarkably by processing a light lead-out surface to have an embossment. A layer containing a p-type dopant like magnesium (Mg) is deposited near the surface of a p-type GaN layer to diffuse it there, and a p-side electrode is made on the p-type GaN layer after removing the deposited layer. This results in ensuring ohmic contact with the p-side electrode, preventing exfoliation of the electrode and improving the reliability.
    Type: Application
    Filed: October 25, 2002
    Publication date: April 3, 2003
    Applicant: KABUSHIKI KAISHA TOSHIBA.
    Inventors: Haruhiko Okazaki, Koichi Nitta, Chiharu Nozaki
  • Patent number: 6495862
    Abstract: Efficiency of leading out light released from an active layer, i.e. the external quantum efficiency, can be improved remarkably by processing a light lead-out surface to have an embossment. A layer containing a p-type dopant like magnesium (Mg) is deposited near the surface of a p-type GaN layer to diffuse it there, and a p-side electrode is made on the p-type GaN layer after removing the deposited layer. This results in ensuring ohmic contact with the p-side electrode, preventing exfoliation of the electrode and improving the reliability.
    Type: Grant
    Filed: December 20, 1999
    Date of Patent: December 17, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Haruhiko Okazaki, Koichi Nitta, Chiharu Nozaki
  • Patent number: 6417020
    Abstract: An electrode of a metal, which is one of Group IV and VI elements, is deposited on an n-type InxAlyGa1−x−yN layer. Alternatively, after an electrode material of carbon, germanium), selenium, rhodium, tellurium, iridium, zirconium, hafnium, copper, titanium nitride, tungsten nitride, molybdenum or titanium silicide, is deposited on an n-type InxAlyGa1−x−yN layer or a p-type InxAlyGa1−x−yN layer, an impurity for increasing the carrier concentration of the semiconductor layer is ion-implanted, and the annealing is carried out. Thus, it is possible to provide a light emitting semiconductor device, which has a low contact resistance and a sufficient bond strength to the InxAlyGa1−x−yN layer while maintaining the crystallinity of the InxAlyGa1−x−yN layer.
    Type: Grant
    Filed: July 2, 2001
    Date of Patent: July 9, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koichi Nitta, Haruhiko Okazaki, Tokuhiko Matsunaga
  • Publication number: 20020014630
    Abstract: An InGaN active layer is formed on a sapphire substrate. A p-side electrode is formed on the InGaN active layer to supply an electric current to this InGaN active layer. The p-side electrode includes {circle over (1)} an Ni layer for forming an ohmic contact with a p-GaN layer, {circle over (2)} an Mo layer having a barrier function of preventing diffusion of impurities, {circle over (3)} an Al layer as a high-reflection electrode, {circle over (4)} a Ti layer having a barrier function, and {circle over (5)} an Au layer for improving the contact with a submount on a lead frame. The p-side electrode having this five-layered structure realizes an ohmic contact and high reflectance at the same time.
    Type: Application
    Filed: June 27, 2001
    Publication date: February 7, 2002
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Haruhiko Okazaki, Hideto Sugawara
  • Patent number: 6316792
    Abstract: A compound semiconductor light emitting element includes a light emitting region formed by a pn-junction between a first compound semiconductor layer of a first conductivity type and a second compound semiconductor layer of a second conductivity type. A first electrode is connected to the first compound semiconductor layer and is isolated from the second compound semiconductor layer. A current spreading layer is formed on the second compound semiconductor layer and a block is formed on the second compound semiconductor layer. A second electrode is formed on the block and is connected to the current spreading layer.
    Type: Grant
    Filed: May 11, 1999
    Date of Patent: November 13, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Haruhiko Okazaki, Yukio Watanabe
  • Publication number: 20010038103
    Abstract: An electrode of a metal, which is one of Group IV and VI elements, is deposited on an n-type InxAlyGa1-x-yN layer. Alternatively, after an electrode material of carbon, germanium), selenium, rhodium, tellurium, iridium, zirconium, hafnium, copper, titanium nitride, tungsten nitride, molybdenum or titanium silicide, is deposited on an n-type InxAlyGa1-x-yN layer or a p-type InxAlyGa1-x-yN layer, an impurity for increasing the carrier concentration of the semiconductor layer is ion-implanted, and the annealing is carried out. Thus, it is possible to provide a light emitting semiconductor device, which has a low contact resistance and a sufficient bond strength to the InxAlyGa1-x-yN layer while maintaining the crystallinity of the InxAlyGa1-x-yN layer.
    Type: Application
    Filed: July 2, 2001
    Publication date: November 8, 2001
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Koichi Nitta, Haruhiko Okazaki, Tokuhiko Matsunaga
  • Patent number: 6281526
    Abstract: An electrode of a metal, which is one of Group IV and VI elements, is deposited on an n-type InxAlyGa1−x−yN layer. Alternatively, after an electrode material of carbon, germanium), selenium, rhodium, tellurium, iridium, zirconium, hafnium, copper, titanium nitride, tungsten nitride, molybdenum or titanium silicide, is deposited on an n-type InxAlyGa1−x−yN layer or a p-type InxAlyGa1−x−yN layer, an impurity for increasing the carrier concentration of the semiconductor layer is ion-implanted, and the annealing is carried out. Thus, it is possible to provide a light emitting semiconductor device, which has a low contact resistance and a sufficient bond strength to the InxAlyGa1−x−yN layer while maintaining the crystallinity of the InxAlyGa1−x−yN layer.
    Type: Grant
    Filed: March 4, 1998
    Date of Patent: August 28, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koichi Nitta, Haruhiko Okazaki, Tokuhiko Matsunaga
  • Patent number: 6228981
    Abstract: A process for preparing an aqueous dispersion coating material containing a resin component having a softening temperature of from 10 to 250° C., which comprises: (1) a step of mixing various starting materials which will be coating film-constituting components, to obtain a blend material, (2) a step of melting and kneading the blend material at a temperature of at least the softening temperature of said resin component, to obtain a homogenized material, (3) a step of cooling and solidifying the homogenized material, followed by crushing, to obtain coarse particles, and (4) a step of wet-pulverizing the coarse particles in an aqueous dispersant, to obtain an aqueous dispersion coating material containing fine particles having an average particle size of at most 10 &mgr;m.
    Type: Grant
    Filed: June 1, 1999
    Date of Patent: May 8, 2001
    Assignee: Dai Nippon Toryo Co., Ltd.
    Inventors: Haruhiko Okazaki, Akiko Tagami
  • Patent number: 5990500
    Abstract: A nitride compound semiconductor light emitting element is made by stacking a metal layer made of one of elements: palladium (Pd), scandium (Sc), vanadium (V), zirconium (Zr), hafnium (Hf), tantalum (Ta), rhodium (Rh), iridium (Ir), cobalt (Co) and copper (Cu), and another metal layer made of one of elements: titanium (Ti), nickel (Ni), molybdenum (Mo), tungsten (W) and magnesium (Mg), to increase the adhesive strength of its electrodes with a semiconductor layer, reduce the contact resistance of the electrodes to improve the ohmic characteristics, and improve the external quantum efficiency by combination of thin-film metals with a transparent electrode.
    Type: Grant
    Filed: March 3, 1999
    Date of Patent: November 23, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Haruhiko Okazaki
  • Patent number: 5977566
    Abstract: A compound semiconductor light emitting element includes a light emitting region formed by a pn-junction between a first compound semiconductor layer of a first conductivity type and a second compound semiconductor layer of a second conductivity type. A first electrode is connected to the first compound semiconductor layer and is isolated from the second compund semiconductor layer. A current spreading layer is formed on the second compound semiconductor layer and a block is formed on the second compound semiconductor layer. A second electrode is formed on the block and is connected to the current spreading layer.
    Type: Grant
    Filed: June 5, 1997
    Date of Patent: November 2, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Haruhiko Okazaki, Yukio Watanabe
  • Patent number: 5966396
    Abstract: A semiconductor laser is formed from a gallium nitride-based compound semiconductor material, and has a double-heterostructure portion obtained by sandwiching an active layer between an n-type cladding layer and a p-type cladding layer on a sapphire substrate. The double-heterostructure portion is formed into a mesa shape on the sapphire substrate via a GaN buffer layer. The two sides of this mesa structure are buried with GaN current blocking layers.
    Type: Grant
    Filed: July 25, 1997
    Date of Patent: October 12, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Haruhiko Okazaki, Hidetoshi Fujimoto, Masayuki Ishikawa, Shinya Nunoue, Genichi Hatakoshi, Masahiro Yamamoto
  • Patent number: 5157473
    Abstract: For providing an avalanche photodiode having a good guard ring effect and a high speed response, a body of semiconductor materials is prepared, which includes a window layer of n-type InP epitaxially grown on an avalanche multiplication layer of n.sup.+ -type InP. The window layer is selectively removed so as to expose the avalanche multiplication layer, thereby providing a recessed portion therein. After a p-type impurity is selectively introduced into the window layer to form a guard ring therein, a p-type impurity is selectively introduced into both the exposed avalanche multiplication layer and the guard ring to provide a PN junction therein.
    Type: Grant
    Filed: April 5, 1991
    Date of Patent: October 20, 1992
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Haruhiko Okazaki
  • Patent number: 4268542
    Abstract: The present invention relates to a process for forming a multi-layer coating including at least two coating layers by performing the oven drying step at one time, which comprises coating at least partially the surface of the substrate with a powder coating composition, then applying a slurry paint composition comprising synthetic resin particles dispersed in an aqueous medium and then heating.
    Type: Grant
    Filed: January 25, 1979
    Date of Patent: May 19, 1981
    Assignee: Dai Nippon Toryo Co., Ltd.
    Inventors: Takao Sakakibara, Haruhiko Okazaki
  • Patent number: 4243565
    Abstract: This invention relates to an aqueous dispersion type coating composition comprising a homogeneous mixture of an aqueous medium, synthetic resin particles and a scaly aluminum pigment.
    Type: Grant
    Filed: August 10, 1979
    Date of Patent: January 6, 1981
    Assignee: Dai Nippon Toryo Co., Ltd.
    Inventors: Sakae Nishino, Takao Sakakibara, Haruhiko Okazaki
  • Patent number: 4137349
    Abstract: The present invention relates to a process for forming a multi-layer coating including at least two coating layers by performing the oven drying step at one time, which comprises applying a slurry paint comprising synthetic resin particles dispersed in an aqueous medium, to an undried coating which is in the non-fluid state but is not completely dried.
    Type: Grant
    Filed: December 20, 1976
    Date of Patent: January 30, 1979
    Assignee: Dai Nippon Toryo Co., Ltd.
    Inventors: Takao Sakakibara, Haruhiko Okazaki