Patents by Inventor Haruki Yokoyama

Haruki Yokoyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11967713
    Abstract: The present invention relates to a positive electrode active material for non-aqueous electrolyte secondary battery, including lithium-nickel composite oxide particles having a layer structure of hexagonal system; and a lithium tungstate coating film disposed on a surface of secondary particles of the lithium-nickel composite oxide particles, wherein the positive electrode active material for non-aqueous electrolyte secondary battery includes, as metallic elements, lithium (Li), nickel (Ni), cobalt (Co), element M (M) which is at least one element selected from Mn, V, Mg, Mo, Nb, Ti, Ca, Cr, Zr, Ta, and Al, and tungsten (W), wherein a ratio of amount of substance in the metallic elements contained is Li:Ni:Co:M:W=a:1-x-y:x:y:z, wherein 0.97?a?1.25, 0?x?0.35, 0?y?0.35, and 0.005?z?0.030.
    Type: Grant
    Filed: May 29, 2019
    Date of Patent: April 23, 2024
    Assignee: SUMITOMO METAL MINING CO., LTD.
    Inventors: Yuki Koshika, Haruki Kaneda, Jun Yokoyama
  • Patent number: 9006854
    Abstract: An APD is provided with the semi-insulating substrate, a first mesa having a first laminate constitution in which a p-type electrode layer, a p-type light absorbing layer, a light absorbing layer with a low impurity concentration, a band gap inclined layer, a p-type electric field control layer, an avalanche multiplier layer, an n-type electric field control layer, and an electron transit layer with a low impurity concentration are stacked in this order on a surface of the semi-insulating substrate, a second mesa having an outer circumference provided inside an outer circumference of the first mesa as viewed from the laminating direction and having a second laminate constitution in which an n-type electrode buffer layer and an n-type electrode layer are stacked in this order on a surface on the electron transit layer side, and a depletion control region that is provided in layers on the second mesa side relative to the p-type electric field control layer, formed in an encircling portion provided inside an out
    Type: Grant
    Filed: September 1, 2011
    Date of Patent: April 14, 2015
    Assignees: NTT Electronics Corporation, Nippon Telegraph and Telephone Corporation
    Inventors: Tadao Ishibashi, Seigo Ando, Masahiro Nada, Yoshifumi Muramoto, Haruki Yokoyama
  • Patent number: 8754445
    Abstract: A layer in which the potential level difference normally unrequired for device operation is generated is positively inserted in a device structure. The potential level difference has such a function that even if a semiconductor having a small bandgap is exposed on a mesa side surface, a potential drop amount of the portion is suppressed, and a leakage current inconvenient for device operation can be reduced. This effect can be commonly obtained for a heterostructure bipolar transistor, a photodiode, an electroabsorption modulator, and so on. In the photodiode, since the leakage current is alleviated, the device size can be reduced, so that in addition to improvement of operating speed with a reduction in series resistance, it is advantageous that the device can be densely disposed in an array.
    Type: Grant
    Filed: January 20, 2012
    Date of Patent: June 17, 2014
    Assignees: NTT Electronics Corporation, Nippon Telegraph and Telephone Corporation
    Inventors: Tadao Ishibashi, Seigo Ando, Yoshifumi Muramoto, Toshihide Yoshimatsu, Haruki Yokoyama
  • Patent number: 8729602
    Abstract: An APD is provided with a semi-insulating substrate, a first mesa having a first laminate constitution in which a p-type electrode layer, a p-type light absorbing layer, a light absorbing layer with a low impurity concentration, a band gap inclined layer, a p-type electric field control layer, an avalanche multiplier layer, an n-type electric field control layer, and an electron transit layer with a low impurity concentration are stacked in this order on a surface of the semi-insulating substrate, a second mesa having an outer circumference provided inside an outer circumference of the first mesa as viewed from the laminating direction and having a second laminate constitution in which an n-type electrode buffer layer and an n-type electrode layer are stacked in this order on a surface on the electron transit layer side of the first mesa, and in the APD, a total donor concentration of the n-type electric field control layer is lower than a total acceptor concentration of the p-type electric field control laye
    Type: Grant
    Filed: September 1, 2011
    Date of Patent: May 20, 2014
    Assignees: NTT Electronics Corporation, Nippon Telegraph and Telephone Corporation
    Inventors: Tadao Ishibashi, Seigo Ando, Masahiro Nada, Yoshifumi Muramoto, Haruki Yokoyama
  • Publication number: 20130313608
    Abstract: A layer in which the potential level difference normally unrequired for device operation is generated is positively inserted in a device structure. The potential level difference has such a function that even if a semiconductor having a small bandgap is exposed on a mesa side surface, a potential drop amount of the portion is suppressed, and a leakage current inconvenient for device operation can be reduced. This effect can be commonly obtained for a heterostructure bipolar transistor, a photodiode, an electroabsorption modulator, and so on. In the photodiode, since the leakage current is alleviated, the device size can be reduced, so that in addition to improvement of operating speed with a reduction in series resistance, it is advantageous that the device can be densely disposed in an array.
    Type: Application
    Filed: January 20, 2012
    Publication date: November 28, 2013
    Applicants: NIPPON TELEGRAPH AND TELEPHONE CORPORATION, NTT ELECTRONICS CORPORATION
    Inventors: Tadao Ishibashi, Seigo Ando, Yoshifumi Muramoto, Toshihide Yoshimatsu, Haruki Yokoyama
  • Patent number: 8575650
    Abstract: An electron injected APD with an embedded n electrode structure in which edge breakdown can be suppressed without controlling the doping profile of an n-type region of the embedded n electrode structure with high precision. The APD comprising a buffer layer with a low ionization rate is inserted between an n electrode connecting layer and an avalanche multiplication layer. Specifically, the APD is an electron injected APD in which an n electrode layer, the n electrode connecting layer, the buffer layer, the avalanche multiplication layer, an electric field control layer, a band gap gradient layer, a low-concentration light absorbing layer, a p-type light absorbing layer, and a p electrode layer are sequentially stacked, and a light absorbing portion that includes at least the low-concentration light absorbing layer and the p-type light absorbing layer forms a mesa shape.
    Type: Grant
    Filed: December 11, 2009
    Date of Patent: November 5, 2013
    Assignees: NTT Electronics Corporation, Nippon Telegraph and Telephone Corporation
    Inventors: Tadao Ishibashi, Seigo Ando, Yoshifumi Muramoto, Fumito Nakajima, Haruki Yokoyama
  • Publication number: 20130168793
    Abstract: An APD is provided with the semi-insulating substrate, a first mesa having a first laminate constitution in which a p-type electrode layer, a p-type light absorbing layer, a light absorbing layer with a low impurity concentration, a band gap inclined layer, a p-type electric field control layer, an avalanche multiplier layer, an n-type electric field control layer, and an electron transit layer with a low impurity concentration are stacked in this order on a surface of the semi-insulating substrate, a second mesa having an outer circumference provided inside an outer circumference of the first mesa as viewed from the laminating direction and having a second laminate constitution in which an n-type electrode buffer layer and an n-type electrode layer are stacked in this order on a surface on the electron transit layer side, and a depletion control region that is provided in layers on the second mesa side relative to the p-type electric field control layer, formed in an encircling portion provided inside an out
    Type: Application
    Filed: September 1, 2011
    Publication date: July 4, 2013
    Applicant: NTT ELECTRONICS CORPORATION
    Inventors: Tadao Ishibashi, Seigo Ando, Masahiro Nada, Yoshifumi Muramoto, Haruki Yokoyama
  • Publication number: 20130154045
    Abstract: An APD is provided with a semi-insulating substrate, a first mesa having a first laminate constitution in which a p-type electrode layer, a p-type light absorbing layer, a light absorbing layer with a low impurity concentration, a band gap inclined layer, a p-type electric field control layer, an avalanche multiplier layer, an n-type electric field control layer, and an electron transit layer with a low impurity concentration are stacked in this order on a surface of the semi-insulating substrate, a second mesa having an outer circumference provided inside an outer circumference of the first mesa as viewed from the laminating direction and having a second laminate constitution in which an n-type electrode buffer layer and an n-type electrode layer are stacked in this order on a surface on the electron transit layer side of the first mesa, and in the APD, a total donor concentration of the n-type electric field control layer is lower than a total acceptor concentration of the p-type electric field control laye
    Type: Application
    Filed: September 1, 2011
    Publication date: June 20, 2013
    Applicants: Nippon Telegraph and Telephone Corporation, NTT Electronics Corporation
    Inventors: Tadao Ishibashi, Seigo Ando, Masahiro Nada, Yoshifumi Muramoto, Haruki Yokoyama
  • Publication number: 20110241150
    Abstract: An electron injected APD with an embedded n electrode structure in which edge breakdown can be suppressed without controlling the doping profile of an n-type region of the embedded n electrode structure with high precision. The APD comprising a buffer layer with a low ionization rate is inserted between an n electrode connecting layer and an avalanche multiplication layer. Specifically, the APD is an electron injected APD in which an n electrode layer, the n electrode connecting layer, the buffer layer, the avalanche multiplication layer, an electric field control layer, a band gap gradient layer, a low-concentration light absorbing layer, a p-type light absorbing layer, and a p electrode layer are sequentially stacked, and a light absorbing portion that includes at least the low-concentration light absorbing layer and the p-type light absorbing layer forms a mesa shape.
    Type: Application
    Filed: December 11, 2009
    Publication date: October 6, 2011
    Inventors: Tadao Ishibashi, Seigo Ando, Yoshifumi Muramoto, Fumito Nakajima, Haruki Yokoyama
  • Patent number: 7242038
    Abstract: An n-type InP sub collector layer 2 heavily doped with silicon (Si), an InP collector layer 3, a p-type GaAs(0.51)Sb(0.49) base layer 4 heavily doped with carbon (C), an n-type In(1-y)Al(y)P emitter layer 7 doped with Si, an n-type InP cap layer 8 heavily doped with Si, and an n-type In(0.53)Ga(0.47)As contact layer 9 heavily doped with Si are stacked on a substrate 1.
    Type: Grant
    Filed: June 24, 2005
    Date of Patent: July 10, 2007
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Yasuhiro Oda, Kenji Kurishima, Haruki Yokoyama, Takashi Kobayashi
  • Publication number: 20060231859
    Abstract: An n-type InP sub collector layer 2 heavily doped with silicon (Si), an InP collector layer 3, a p-type GaAs(0.51)Sb(0.49) base layer 4 heavily doped with carbon (C), an n-type In(1-y)Al(y)P emitter layer 7 doped with Si, an n-type InP cap layer 8 heavily doped with Si, and an n-type In(0.53)Ga(0.47)As contact layer 9 heavily doped with Si are stacked on a substrate 1.
    Type: Application
    Filed: June 24, 2005
    Publication date: October 19, 2006
    Inventors: Yasuhiro Oda, Kenji Kurishima, Haruki Yokoyama, Takashi Kobayashi
  • Patent number: 5483919
    Abstract: An atomic layer epitaxy method uses an organometal consisting of a metal and an alkyl group and having a self-limiting mechanism. At least one bond between the metal and the alkyl group of the organometal is dissociated, and organometal molecules consisting of the metal and the alkyl group, and a hydride or organometal molecules consisting of a different metal are alternately supplied on a substrate while at least one bond is left, thereby growing an atomic layer on the substrate. An atomic layer epitaxy apparatus is also disclosed.
    Type: Grant
    Filed: August 17, 1994
    Date of Patent: January 16, 1996
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Haruki Yokoyama, Masanori Shinohara