Patents by Inventor Harunobu Sato
Harunobu Sato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240150563Abstract: A resin composition for a laminated glass interlayer film or a solar cell encapsulant contains an ethylene-unsaturated ester copolymer (A) and a crosslinking agent (B). When the torque of the resin composition is measured over time at 130° C. using a moving die rheometer, the torque value 60 minutes after the start of measurement is defined as T100 [dN·m], the torque value of 10% of T100 is defined as T10, the torque value of 50% of T100 is defined as T50, the minimum torque value during measurement is defined as Tmin, the time to reach T10 from the start of measurement is defined as X [min], and the time to reach T50 from the start of measurement is defined as Y [min], the crosslinking rate represented by (T50?T10)/(Y?X) (where T50=(100?Tmin)×0.5+Tmin, T10=(T100?Tmin)×0.1+Tmin) exceeds 0.01 dN·m/min and 0.25 dN·m/min or less.Type: ApplicationFiled: January 11, 2024Publication date: May 9, 2024Inventors: Kana FUKUYAMA, Norihiko SATO, Harunobu KOMATSU, Kei NAGAYAMA, Motoaki ISOKAWA
-
Patent number: 10943857Abstract: A substrate for semiconductor elements includes a terminal part including a first surface, a second surface opposite to the first surface, and side surfaces joining the first surface and the second surface, and a resin part covering the side surfaces and exposing the first surface of the terminal part. The resin part has a multi-layer structure including a first resin and a second resin, and the first resin is provided in contact with the side surfaces of the terminal part. The first resin and the second resin include a filler, and an amount of the filler included in the first resin is smaller than an amount of the filler included in the second resin.Type: GrantFiled: August 1, 2018Date of Patent: March 9, 2021Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Kentaro Kaneko, Harunobu Sato, Tsukasa Nakanishi, Junichi Nakamura, Koji Watanabe
-
Publication number: 20190088578Abstract: A substrate for semiconductor elements includes a terminal part including a first surface, a second surface opposite to the first surface, and side surfaces joining the first surface and the second surface, and a resin part covering the side surfaces and exposing the first surface of the terminal part. The resin part has a multi-layer structure including a first resin and a second resin, and the first resin is provided in contact with the side surfaces of the terminal part. The first resin and the second resin include a filler, and an amount of the filler included in the first resin is smaller than an amount of the filler included in the second resin.Type: ApplicationFiled: August 1, 2018Publication date: March 21, 2019Inventors: Kentaro KANEKO, Harunobu SATO, Tsukasa NAKANISHI, Junichi NAKAMURA, Koji WATANABE
-
Patent number: 10040268Abstract: An anti-slip sheet to be used around water can be easily fixed onto the floor or bathtubs, etc., by simply adhering. The sheet resists curling (coiling) or separation, has low surface irritation on skin, and even under humid environment has excellent anti-slip properties. The anti-slip sheet includes a resin film having a Shore A hardness of 60 or higher and 82 or lower, a protrusion and indentation surface where the maximum value of the adjacent protrusions peaks are within the range of 10 microns or higher and 150 microns or lower, has a maximum height Rmax of the surface roughness within the range of 15 microns or higher and 90 microns or lower, and includes a top part reinforcing film positioned on the resin film on the side opposite to the protrusions and indentations containing surface which is harder than the resin film, and includes a bottom part adhesive layer positioned on the side of the top part reinforcing film that is opposite to the resin film.Type: GrantFiled: July 29, 2014Date of Patent: August 7, 2018Assignee: 3M INNOVATIVE PROPERTIES COMPANYInventors: Makoto Sasaki, Harunobu Sato
-
Patent number: 9466556Abstract: A lead frame includes an outer lead and a plating layer that covers a lower surface and side surfaces of the outer lead. The plating layer does not cover the upper surface of the outer lead. A frame base material is exposed from the plating layer at the upper surface of the outer lead.Type: GrantFiled: March 21, 2014Date of Patent: October 11, 2016Assignee: Shinko Electric Industries Co., Ltd.Inventors: Harunobu Sato, Takashi Yoshie, Susumu Kurashima
-
Publication number: 20160167335Abstract: An anti-slip sheet to be used around water can be easily fixed onto the floor or bathtubs, etc., by simply adhering. The sheet resists curling (coiling) or separation, has low surface irritation on skin, and even under humid environment has excellent anti-slip properties.Type: ApplicationFiled: July 29, 2014Publication date: June 16, 2016Inventors: Makoto SASAKI, Harunobu SATO
-
Patent number: 9313710Abstract: Provided are a wireless base station apparatus and communication control method whereby a peripheral terminal device immediately hands over to a base station apparatus when said base station apparatus is activated. In response to timer values and the number of terminal units within a coverage area, a controller (504) of an MeNB (500) selects a dormant mode, activation mode or stationary mode for the base station itself and notifies an uplink received signal determiner (505) and transmission power determiner (506) of the selected mode information. In activation mode, the uplink received signal determiner (505) sets the timing for initial connection signals more frequently than dormant mode. In activation mode, the transmission power determiner (506) determines the increase in downlink transmission power over time and notifies the downlink transmission signal processor (507) of the transmission power.Type: GrantFiled: April 24, 2012Date of Patent: April 12, 2016Assignee: Nokia Solutions and Networks OyInventors: Masahiko Nanri, Harunobu Sato
-
Publication number: 20140291827Abstract: A lead frame includes an outer lead and a plating layer that covers a lower surface and side surfaces of the outer lead. The plating layer does not cover the upper surface of the outer lead. A frame base material is exposed from the plating layer at the upper surface of the outer lead.Type: ApplicationFiled: March 21, 2014Publication date: October 2, 2014Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Harunobu SATO, Takashi YOSHIE, Susumu Kurashima
-
Publication number: 20140016615Abstract: Provided are a wireless base station apparatus and communication control method whereby a peripheral terminal device immediately hands over to a base station apparatus when said base station apparatus is activated. In response to timer values and the number of terminal units within a coverage area, a controller (504) of an MeNB (500) selects a dormant mode, activation mode or stationary mode for the base station itself and notifies an uplink received signal determiner (505) and transmission power determiner (506) of the selected mode information. In activation mode, the uplink received signal determiner (505) sets the timing for initial connection signals more frequently than dormant mode. In activation mode, the transmission power determiner (506) determines the increase in downlink transmission power over time and notifies the downlink transmission signal processor (507) of the transmission power.Type: ApplicationFiled: April 24, 2012Publication date: January 16, 2014Inventors: Masahiko Nanri, Harunobu Sato
-
Patent number: 7329944Abstract: A leadframe for a semiconductor device of the present invention is a leadframe for a semiconductor device having a stage section where a semiconductor chip is to be mounted, an inner lead section connected to the stage section, and an outer lead section connected to the inner lead section. The leadframe has (1) a nickel (Ni) layer 1, (2) a palladium (Pd) or palladium alloy layer 2, (3) a tin (Sn) or tin alloy layer or a zinc (Zn) or zinc alloy layer 3, 3a, or 3b, and (4) a gold (Au) layer 4, 4a, or 4b, all of which are formed on a base material B forming the leadframe in sequence from the surface of the leadframe.Type: GrantFiled: March 22, 2006Date of Patent: February 12, 2008Assignee: Shinko Electric Industries Co., Ltd.Inventors: Kazumitsu Seki, Harunobu Sato, Muneaki Kure
-
Patent number: 7190057Abstract: A packaging component used for constituting a package mounting a semiconductor element, and a semiconductor package using the packaging component. The packaging component has on at least a portion of the surface thereof a covered surface which is sealed with an insulating resin or on which an adhesive layer is applied, and the packaging component comprises a conductor substrate and an electrically conducting layer partly or entirely covering the surface thereof, and the electrically conducting layer comprises a rough-surface plated layer having a roughened surface profile on the covered surface. The packaging component includes, for example, a lead frame and a heat-radiating or heat-dissipating plate.Type: GrantFiled: April 30, 2004Date of Patent: March 13, 2007Assignee: Shinko Electric Industries Co., Ltd.Inventors: Kazumitsu Seki, Takashi Yoshie, Harunobu Sato, Yoshihito Miyahara
-
Publication number: 20060214272Abstract: A leadframe for a semiconductor device of the present invention is a leadframe for a semiconductor device having a stage section where a semiconductor chip is to be mounted, an inner lead section connected to the stage section, and an outer lead section connected to the inner lead section. The leadframe has (1) a nickel (Ni) layer 1, (2) a palladium (Pd) or palladium alloy layer 2, (3) a tin (Sn) or tin alloy layer or a zinc (Zn) or zinc alloy layer 3, 3a, or 3b, and (4) a gold (Au) layer 4, 4a, or 4b, all of which are formed on a base material B forming the leadframe in sequence from the surface of the leadframe.Type: ApplicationFiled: March 22, 2006Publication date: September 28, 2006Applicant: Shinko Electric Industries Co., Ltd.Inventors: Kazumitsu Seki, Harunobu Sato, Muneaki Kure
-
Publication number: 20040232534Abstract: A packaging component used for constituting a package mounting a semiconductor element, and a semiconductor package using the packaging component. The packaging component has on at least a portion of the surface thereof a covered surface which is sealed with an insulating resin or on which an adhesive layer is applied, and the packaging component comprises a conductor substrate and an electrically conducting layer partly or entirely covering the surface thereof, and the electrically conducting layer comprises a rough-surface plated layer having a roughened surface profile on the covered surface. The packaging component includes, for example, a lead frame and a heat-radiating or heat-dissipating plate.Type: ApplicationFiled: April 30, 2004Publication date: November 25, 2004Applicant: SHINKO ELECTRIC INDUSTRIES, CO., LTD.Inventors: Kazumitsu Seki, Takashi Yoshie, Harunobu Sato, Yoshihito Miyahara
-
Patent number: 6593643Abstract: A semiconductor device lead frame made of copper or a copper alloy used for a resin sealing type semiconductor device, comprising a lead frame body made of copper or a copper alloy, a double-layer under plating film formed on the lead frame body and comprising a lower layer made of zinc or a copper-zinc alloy and an upper layer made of copper having a thickness of 0.02 to 0.4 &mgr;m and a precious metal plating film formed on at least a wire bonding portion of an inner lead of the copper upper layer of the under plating film. This lead frame is excellent in adhesion with a sealing resin, is free from contaminate a precious metal plating solution (particularly a silver plating solution), has a good appearance of the precious metal plating film, is excellent in corrosion resistance and moisture resistance, and has a good appearance and adhesion of an external solder plating film.Type: GrantFiled: December 7, 2000Date of Patent: July 15, 2003Assignee: Shinko Electric Industries Co., Ltd.Inventors: Kazumitsu Seki, Takashi Yoshie, Harunobu Sato