Patents by Inventor Hassan Chafi

Hassan Chafi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11222070
    Abstract: Techniques are described herein for a vectorized hash table that uses very efficient grow and insert techniques. A single-probe hash table is grown via vectorized instructions that split each bucket, of the hash table, into a respective upper and lower bucket of the expanded hash table. Further, vacant slots are indicated using a vacant-slot-indicator value, e.g., ‘0’, and all vacant slots follow to the right of all occupied slots in a bucket. A vectorized compare instruction determines whether a value is already in the bucket. If not, the vectorized compare instruction is also used to determine whether the bucket has a vacant slot based on whether the bucket contains the vacant-slot-indicator value. To insert the value into the bucket, vectorized instructions are used to shift the values in the bucket to the right by one slot and to insert the new value into the left-most slot.
    Type: Grant
    Filed: February 27, 2020
    Date of Patent: January 11, 2022
    Assignee: Oracle International Corporation
    Inventors: Benjamin Schlegel, Martin Sevenich, Pit Fender, Matthias Brantner, Hassan Chafi
  • Publication number: 20210406265
    Abstract: To execute function-step-based graph queries on a graph engine that has its own graph query language, rather than re-implementing an existing infrastructure to support function-step-based graph protocols, function-step-based graph queries are transformed to the graph query language that is understood by the graph engine. The existing infrastructure computes the results of the transformed queries. Result sets are then transformed to function-based-based result sets, which are returned to customers. In this manner, the graph engine supports function-step-based graph query workloads without implementation of the function-step-based graph protocol.
    Type: Application
    Filed: June 30, 2020
    Publication date: December 30, 2021
    Inventors: Martijn Dwars, Martin Sevenich, Sungpack Hong, Guido Wachsmuth, Hassan Chafi
  • Patent number: 11210224
    Abstract: Techniques are provided for performing a flush operation in a non-coherent cache. In response to determining to perform a flush operation, a cache unit flushes certain data items. The flush operation may be performed in response to a lapse of a particular amount of time, such as a number of cycles, or an explicit flush instruction that does not indicate any cache entry or data item. The cache unit may store change data that indicates which entry stores a data item that has been modified but not yet been flushed. The change data may be used to identify the entries that need to be flushed. In one technique, a dirty cache entry that is associated with one or more relatively recent changes is not flushed during a flush operation.
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: December 28, 2021
    Assignee: Oracle International Corporation
    Inventors: Sungpack Hong, Hassan Chafi, Eric Sedlar
  • Patent number: 11205050
    Abstract: Techniques are described herein for learning property graph representations edge-by-edge. In an embodiment, an input graph is received. The input graph comprises a plurality of vertices and a plurality of edges. Each vertex of the plurality of vertices is associated with vertex properties of the respective vertex. A vertex-to-property mapping is generated for each vertex of the plurality of vertices. The mapping maps each vertex to a vertex-property signature of a plurality of vertex-property signatures. A plurality of edge words is generated. Each edge word corresponds to one or more edges that each begin at a first vertex having a particular vertex-property signature of the plurality of vertex property signatures and end at a second vertex having a particular vertex-property signature of the plurality of vertex property signatures. A plurality of sentences is generated. Each sentence comprises edge words directly connected along a path of a plurality of paths in the input graph.
    Type: Grant
    Filed: November 2, 2018
    Date of Patent: December 21, 2021
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventors: Rhicheek Patra, Sungpack Hong, Jinha Kim, Damien Hilloulin, Davide Bartolini, Hassan Chafi
  • Publication number: 20210392073
    Abstract: A pattern matching engine interprets a query into a data structure resembling a finite state machine. Vertices in the query pattern are treated as states or stages, while edges connecting them are treated as state transitions or hops. To match the full pattern, the first stage is first matched by applying vertex filters, if any. If the vertex is eligible, its edges that satisfy the edge filters, if any, are followed to move to the neighbors that can potentially produce results, thus progressing to the next stage. This process is repeated; if all stages are matched, then the whole pattern has been matched successfully.
    Type: Application
    Filed: June 11, 2020
    Publication date: December 16, 2021
    Inventors: Petar Tonkovic, Vasileios Trigonakis, Tomas Faltin, Sungpack Hong, Hassan Chafi
  • Publication number: 20210373938
    Abstract: In an embodiment, a computer of a cluster of computers receives graph logic that specifies a sequence of invocations, including a current invocation and a next invocation, of parallelism operations that can detect whether the graph logic should prematurely terminate. The computer initiates, on the computers of the cluster, execution of the graph logic to process a distributed graph. Before the current invocation, the graph logic registers reversion logic for a modification of the distributed graph that execution of the graph logic has caused. During the current invocation, it is detected that the graph logic should prematurely terminate. Execution of the graph logic on the cluster is terminated without performing the next invocation in the sequence of invocations. The reversion logic reverses the modification of the distributed graph to restore consistency. The distributed graph is retained in volatile memory of the cluster for reuse such as relaunch of the graph logic.
    Type: Application
    Filed: May 26, 2020
    Publication date: December 2, 2021
    Inventors: Petr Koupy, Vasileios Trigonakis, Iraklis Psaroudakis, Jinsoo Lee, Sungpack Hong, Hassan Chafi
  • Patent number: 11169804
    Abstract: Techniques for maintaining d-heap property and speeding up retrieval operations, such as top or pop, by vectorizing the d-heap and utilizing horizontal aggregation SIMD instructions across the retrieval operations. A d-heap is vectorized by storing it in a contiguous memory array containing a beginning-most side and end-most side. Horizontal aggregation SIMD instructions are utilized to aggregate the values of the vectorized d-heap. Thus, the number of comparisons required in order to find the maximum or minimum key value within a single node of the d-heap is reduced resulting in faster retrieval operations.
    Type: Grant
    Filed: September 24, 2018
    Date of Patent: November 9, 2021
    Assignee: Oracle International Corporation
    Inventors: Benjamin Schlegel, Harshad Kasture, Pit Fender, Matthias Brantner, Hassan Chafi
  • Publication number: 20210318886
    Abstract: Vectorized sorted-set intersection is performed using conflict-detection single instruction, multiple data (SIMD) instructions. A first ordered subset of values of a first ordered set of distinct values and a second ordered subset of values of a second ordered set of distinct values is loaded into a register. A first value in the register that matches another value in the register (i.e., common values) is identified by performing an SIMD instruction. The first value is then stored in a result set representing a merge-sort result set between the first ordered set of distinct values and the second ordered set of distinct values.
    Type: Application
    Filed: April 13, 2020
    Publication date: October 14, 2021
    Inventors: Benjamin Schlegel, Pit Fender, Matthias Brantner, Hassan Chafi
  • Publication number: 20210294603
    Abstract: Techniques are provided for lazy push optimization, allowing for constant time push operations. A d-heap is used as the underlying data structure for indexing values being inserted. The d-heap is vectorized by storing values in a contiguous memory array. Heapify operations are delayed until a retrieve operation occurs, improving insert performance of vectorized d-heaps that use horizontal aggregation SIMD instructions at the cost of slightly lower retrieve performance.
    Type: Application
    Filed: March 18, 2020
    Publication date: September 23, 2021
    Inventors: Harshad Kasture, Matthias Brantner, Hassan Chafi, Benjamin Schlegel, Pit Fender
  • Patent number: 11120082
    Abstract: Techniques are provided herein for efficient representation of heterogeneous graphs in memory. In an embodiment, vertices and edges of the graph are segregated by type. Each property of a type of vertex or edge has values stored in a respective vector. Directed or undirected edges of a same type are stored in compressed sparse row (CSR) format. The CSR format is more or less repeated for edge traversal in either forward or reverse direction. An edge map translates edge offsets obtained from traversal in the reverse direction for use with data structures that expect edge offsets in the forward direction. Subsequent filtration and/or traversal by type or property of vertex or edge entails minimal data access and maximal data locality, thereby increasing efficient use of the graph.
    Type: Grant
    Filed: April 18, 2018
    Date of Patent: September 14, 2021
    Assignee: Oracle International Corporation
    Inventors: Damien Hilloulin, Davide Bartolini, Oskar Van Rest, Alexander Weld, Sungpack Hong, Hassan Chafi
  • Publication number: 20210279282
    Abstract: Techniques are provided herein for efficient representation of heterogeneous graphs in memory. In an embodiment, vertices and edges of the graph are segregated by type. Each property of a type of vertex or edge has values stored in a respective vector. Directed or undirected edges of a same type are stored in compressed sparse row (CSR) format. The CSR format is more or less repeated for edge traversal in either forward or reverse direction. An edge map translates edge offsets obtained from traversal in the reverse direction for use with data structures that expect edge offsets in the forward direction. Subsequent filtration and/or traversal by type or property of vertex or edge entails minimal data access and maximal data locality, thereby increasing efficient use of the graph.
    Type: Application
    Filed: May 25, 2021
    Publication date: September 9, 2021
    Inventors: DAMIEN HILLOULIN, DAVIDE BARTOLINI, OSKAR VAN REST, Alexander Weld, Sungpack Hong, Hassan Chafi
  • Publication number: 20210271711
    Abstract: Techniques are described for a vectorized queue, which implements a vectorized ‘contains’ function that determines whether a value is in the queue. A three-phase vectorized shortest-path graph search splits each expanding and probing iteration into three phases that utilize vectorized instructions: (1) The neighbors of nodes that are in a next queue are fetched and written into a current queue. (2) It is determined whether the destination node is among the fetched neighbor nodes in the current queue. (3) The fetched neighbor nodes that have not yet been visited are put into the next queue. According to an embodiment, a vectorized copy operation performs vector-based data copying using vectorized load and store instructions. Specifically, vectors of data are copied from a source to a destination. Any invalid data copied to the destination is overwritten, either with a vector of additional valid data or with a vector of nonce data.
    Type: Application
    Filed: February 27, 2020
    Publication date: September 2, 2021
    Inventors: Benjamin Schlegel, Martin Sevenich, Pit Fender, Matthias Brantner, Hassan Chafi
  • Publication number: 20210271710
    Abstract: Techniques are described herein for a vectorized hash table that uses very efficient grow and insert techniques. A single-probe hash table is grown via vectorized instructions that split each bucket, of the hash table, into a respective upper and lower bucket of the expanded hash table. Further, vacant slots are indicated using a vacant-slot-indicator value, e.g., ‘0’, and all vacant slots follow to the right of all occupied slots in a bucket. A vectorized compare instruction determines whether a value is already in the bucket. If not, the vectorized compare instruction is also used to determine whether the bucket has a vacant slot based on whether the bucket contains the vacant-slot-indicator value. To insert the value into the bucket, vectorized instructions are used to shift the values in the bucket to the right by one slot and to insert the new value into the left-most slot.
    Type: Application
    Filed: February 27, 2020
    Publication date: September 2, 2021
    Inventors: Benjamin Schlegel, Martin Sevenich, Pit Fender, Matthias Brantner, Hassan Chafi
  • Publication number: 20210240705
    Abstract: Techniques are described for enabling in-memory execution of any-sized graph data query by utilizing both depth first search (DFS) principles and breadth first search (BFS) principles to control the amount of memory used during query execution. Specifically, threads implementing a graph DBMS switch between a BFS mode of data traversal and a DFS mode of data traversal. For example, when a thread detects that there are less than a configurable threshold number of intermediate results in memory, the thread enters BFS-based traversal techniques to increase the number of intermediate results in memory. When the thread detects that there are at least the configurable threshold number of intermediate results in memory, the thread enters DFS mode to produce final results, which generally works to move the intermediate results that are currently available in memory to final query results, thereby reducing the number of intermediate results in memory.
    Type: Application
    Filed: January 31, 2020
    Publication date: August 5, 2021
    Inventors: Vasileios Trigonakis, Tomas Faltin, Jean-Pierre Lozi, Vlad Ioan Haprian, Sungpack Hong, Hassan Chafi
  • Publication number: 20210240456
    Abstract: Techniques are described for compiling source code to generate graph-optimized intermediate representation instructions of the source code that implement techniques for optimizing algorithms for graph analysis. A compiler, executing on a computing device, receives source code instructions for a program to be compiled. The compiler identifies a target expression, within the source code instructions, that invokes a particular method call on a particular object type. The target expression contains a target block of code to be translated into an intermediate representation using graph-optimized compilation techniques. The compiler generates a block of graph-specific intermediate representation instructions to replace the target expression. The compiler compiles the source code instructions to generate intermediate representation instructions, where the intermediate representation instructions include the block of graph-specific intermediate representation instructions in place of the target expression.
    Type: Application
    Filed: January 30, 2020
    Publication date: August 5, 2021
    Inventors: Martijn Dwars, Martin Sevenich, Sungpack Hong, Hassan Chafi, Guido Wachsmuth
  • Publication number: 20210232402
    Abstract: Techniques are provided for vectorizing Heapsort. A K-heap is used as the underlying data structure for indexing values being sorted. The K-heap is vectorized by storing values in a contiguous memory array containing a beginning-most side and end-most side. The vectorized Heapsort utilizes horizontal aggregation SIMD instructions for comparisons, shuffling, and moving data. Thus, the number of comparisons required in order to find the maximum or minimum key value within a single node of the K-heap is reduced resulting in faster retrieval operations.
    Type: Application
    Filed: April 9, 2021
    Publication date: July 29, 2021
    Inventors: Benjamin Schlegel, Pit Fender, Harshad Kasture, Matthias Brantner, Hassan Chafi
  • Patent number: 11074260
    Abstract: Techniques are described herein for space-efficient encoding of label information of property graphs. In an embodiment, an input graph is received. The input graph comprises a plurality of entities and a plurality of label sets. Each entity of said plurality of entities is associated with a label set of the plurality of label sets and each label set of the plurality of label sets comprises zero or more labels of a plurality of labels. A first mapping is generated that maps each label of the plurality of labels to a label code. A second mapping is generated that maps each label integer set of a plurality of label integer sets to a label code. Each label integer set of the plurality of label integer sets corresponds to a label set of the plurality of label sets, wherein each label integer set of the plurality of label integer sets comprises label codes from the first mapping that are mapped to each label included in the corresponding label set.
    Type: Grant
    Filed: April 8, 2019
    Date of Patent: July 27, 2021
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventors: Arnaud Delamare, Vasileios Trigonakis, Vlad Ioan Haprian, Oskar Van Rest, Sungpack Hong, Hassan Chafi, Tomas Faltin, Jean-Pierre Lozi
  • Patent number: 11068538
    Abstract: Techniques herein are for navigation data structures for graph traversal. In an embodiment, navigation data structures that a computer stores include: a source vertex array of vertices; a neighbor array of dense identifiers of target vertices terminating edges; a bidirectional map associating, for each vertex, a sparse identifier of the vertex with a dense identifier of the vertex; and a vertex array containing, when a dense identifier of a source vertex is used as an offset, a pair of offsets defining an offset range, for use with the neighbor array. The source vertex array, using the dense identifier of a particular vertex as an offset, contains an offset, into a neighbor array, of a target vertex terminating an edge originating at the particular vertex. The neighbor array contiguously stores dense identifiers of target vertices terminating edges originating from a same source vertex.
    Type: Grant
    Filed: February 1, 2019
    Date of Patent: July 20, 2021
    Assignee: Oracle International Corporation
    Inventors: Michael Haubenschild, Sungpack Hong, Hassan Chafi, Korbinian Schmid, Martin Sevenich, Alexander Weld
  • Publication number: 20210216590
    Abstract: Techniques are described herein for early pruning of potential graph query results. Specifically, based on determining that property values of a path through graph data cannot affect results of a query, the path is pruned from a set of potential query solutions prior to fully exploring the path. Early solution pruning is performed on prunable queries that project prunable functions including MIN, MAX, SUM, and DISTINCT, the results of which are not tied to a number of paths explored for query execution. A database system implements early solution pruning for a prunable query based on intermediate results maintained for the query during query execution. Specifically, when a system determines that property values of a given potential solution path cannot affect the query results reflected in intermediate results maintained for the query, the path is discarded from the set of possible query solutions without further exploration of the path.
    Type: Application
    Filed: January 9, 2020
    Publication date: July 15, 2021
    Inventors: ARNAUD DELAMARE, VASILEIOS TRIGONAKIS, JEAN-PIERRE LOZI, VLAD IOAN HAPRIAN, PETR KOUPY, HASSAN CHAFI, SUNGPACK HONG
  • Publication number: 20210209108
    Abstract: Herein are techniques to accelerate finding a top few shortest paths between two vertices of a graph. In an embodiment, a computer calculates, for a graph that contains vertices that include landmark vertices, distances between each vertex and each landmark vertex. Based on the distances from each vertex to each landmark vertex, a top few shortest paths from a source vertex to a target vertex are calculated. In an embodiment, triangulation establishes a lower bound on a distance from a neighbor vertex of a current vertex to a target vertex of a query. In an embodiment, distance predictions based on the distance lower bounds are used to accelerate a K-A star search for the top few shortest paths.
    Type: Application
    Filed: January 3, 2020
    Publication date: July 8, 2021
    Inventors: Vlad Haprian, Oskar Van Rest, Sungpack Hong, Hassan Chafi, Bence Czipo