Patents by Inventor Hayami Matsunaga

Hayami Matsunaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7408997
    Abstract: A modulation and demodulation system is provided. The system uses n sub-carrier frequencies and an oversampling positive integer and includes a modulation circuit and a demodulation circuit. The modulation circuit includes a modulation ROM that stores columns of elements independently in a modulation ROM matrix. The demodulation circuit includes 2n numbers of a ROM1 that stores elements of a combined matrix. The combined matrix is generated by combining a number of inverse matrices where the inverse matrices are generated from the modulation ROM.
    Type: Grant
    Filed: November 28, 2002
    Date of Patent: August 5, 2008
    Assignee: W.T. Device Company, Inc.
    Inventor: Hayami Matsunaga
  • Patent number: 7358445
    Abstract: The present invention provides a circuit substrate which has a substrate including a first surface and a second surface opposite to the first surface. A first and a second conductor patterns are formed on the first and the second surface respectively. The second surface has larger surface roughness than the first surface. When the circuit substrate is mounted on another substrate, it is mounted to the other substrate via the second surface. The circuit substrate is capable of mounting a device or being mounted on another substrate to form an apparatus.
    Type: Grant
    Filed: September 14, 2000
    Date of Patent: April 15, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Noboru Mohri, Hayami Matsunaga, Masaaki Hayama, Tomitarou Murakami
  • Patent number: 6861744
    Abstract: A multilayer ceramic substrate has a first conductive pattern that is transfer-printed on a ceramic substrate using an intaglio plate made of a flexible resin. The intaglio plate has a plurality of grooves with different depts. A first insulation layer is on the first conductive pattern, and a second conductive pattern is on the insulating layer. The two conductive patterns are coupled by a via.
    Type: Grant
    Filed: February 12, 2002
    Date of Patent: March 1, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masaaki Hayama, Noboru Mouri, Hayami Matsunaga
  • Publication number: 20040258169
    Abstract: When a narrow-band digital filter is used for demodulating a signal which has been modulated by using a plenty of sub-carriers, the number of stages is increased, analysis requires a long time, the transmission speed is not increased, and the circuit size is increased. The modulation circuit operation is considered as multiplication.
    Type: Application
    Filed: May 20, 2004
    Publication date: December 23, 2004
    Inventor: Hayami Matsunaga
  • Patent number: 6429114
    Abstract: A method of fabricating a multi-layer ceramic substrate for forming a first conductive pattern on a ceramic substrate. An intaglio plate is manufactured which has first and second grooves. The grooves are filled with an electroconductive paste. Conductivity of paths in the grooves is increased by deaerating and drying the paste. The intaglio plate is glued to and then separated from a ceramic substrate so that the pattern of the pattern of the electroconductive paste is transferred to the substrate. An insulation layer and a further conductive pattern are then applied.
    Type: Grant
    Filed: October 14, 1998
    Date of Patent: August 6, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masaaki Hayama, Noboru Mouri, Hayami Matsunaga
  • Publication number: 20020100966
    Abstract: A first conductive pattern (3) is transfer-printed on a ceramic substrate (2) using an intaglio plate made of a flexible resin, and a first insulation layer (21) is formed thereon, and a second conductive pattern (4) is formed on it. The two conductive patterns (3, 4) are coupled by means of a via (11).
    Type: Application
    Filed: February 12, 2002
    Publication date: August 1, 2002
    Inventors: Masaaki Hayama, Noboru Mouri, Hayami Matsunaga
  • Publication number: 20020094604
    Abstract: A first conductive pattern (3) is transfer-printed on a ceramic substrate (2) using an intaglio plate made of a flexible resin, and a first insulation layer (21) is formed thereon, and a second conductive pattern (4) is formed on it. The two conductive patterns (3, 4) are coupled by means of a via (11).
    Type: Application
    Filed: February 20, 2002
    Publication date: July 18, 2002
    Inventors: Masaaki Hayama, Noboru Mouri, Hayami Matsunaga
  • Patent number: 6374733
    Abstract: The present invention relates to a manufacturing method of a ceramic substrate used in various electronic appliances, and more particularly to a manufacturing method of a ceramic substrate forming a conductor pattern by intaglio printing. A conductive paste is supplied in the intaglio by using any one of screen mask, metal mask, or drawing device, and therefore the conductive paste can be supplied uniformly in desired positions only. The supplying amount of the conductive paste can be adjusted by repeating printing, so that an optimum amount can be set depending on the pattern. As a result, a fine wiring pattern of thick film can be easily formed, and a ceramic circuit board low in wiring resistance, high in wiring density, and high in dimensional precision of wiring pattern can be obtained.
    Type: Grant
    Filed: September 25, 2000
    Date of Patent: April 23, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masaaki Hayama, Noboru Mouri, Hayami Matsunaga, Masayuki Mizuno, Eiji Kawamoto, Yuji Yagi
  • Patent number: 6303989
    Abstract: The present invention relates to integrated circuit devices for use in such civilian equipments as an electronic equipment, electrical equipment, communication equipment and measuring and controlling equipment, and its object is to provide an integrated circuit device which has an excellent heat radiating characteristic.
    Type: Grant
    Filed: February 16, 1996
    Date of Patent: October 16, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takeo Yasuho, Masao Iwata, Ryoichi Katsuragawa, Hayami Matsunaga, Yoshikazu Suehiro, Yasuhiko Yokota
  • Patent number: 6132543
    Abstract: The present invention provides a packaged substrate which has a superior positioning accuracy of wiring formed on a circuit substrate made of ceramics, and a conductive pattern with a thick film and yet a fine pattern. On a surface of flexible base member made of plastic, fine grooves are formed in a pattern corresponding to a first conductive pattern so that a cavity face is produced. Conductive paste is filled and into the grooves on this cavity face, and then dried. The cavity face and a circuit substrate are pasted with each other by applying predetermined heat and pressure. A pattern of the dried conductive paste is transcribed onto the circuit substrate, and then the first conductive pattern is formed by firing. A first ball solder is coupled with a second conductive pattern which is coupled to the first conductive pattern through an electrode in a through-hole of the circuit substrate.
    Type: Grant
    Filed: March 13, 1998
    Date of Patent: October 17, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Noboru Mohri, Hayami Matsunaga, Masaaki Hayama, Tomitarou Murakami
  • Patent number: 6051448
    Abstract: In a method of manufacturing an electronic component for forming a conductor pattern on an insulating substrate by transfer method employing intaglio printing technique, this manufacturing method comprises a step of fabricating an intaglio 20 made of flexible resin forming an insulating layer 23 on a groove 21, a step of filling the groove 21 with Ag paste 24 and drying, a step of overlaying the intaglio 20 on an insulating substrate 2 having a water-soluble resin 28 formed on the surface by pressing a pressing portion 26, freezing, peeling off the intaglio 20 and insulating substrate 2, and transferring the pattern of the Ag paste 24, and a step of firing it and forming a conductor pattern.
    Type: Grant
    Filed: June 6, 1997
    Date of Patent: April 18, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masaaki Hayama, Noboru Mouri, Tetsu Murakawa, Hayami Matsunaga, Masayuki Mizuno
  • Patent number: 5742097
    Abstract: Two modules, each of which has a plurality of memory IC chips installed therein, are stacked to form a module unit. Furthermore, a plurality of the module units are installed on a mother board so as to form a multilevel semiconductor integrated circuit device. By further stacking a specific module containing an IC chip for replacing the functions of a defective chip, a repair process can be conducted more easily and efficiently. Alternatively, instead of the module units, a plurality of TAB packages stacked in a multilayer structure are installed on the mother board. Outer leads of each of the TAB packages and terminal pads on the circuit board are respectively connected to each other in a one-to-one way. Thus, only a defective TAB package need be taken away and consequently, efficiency in the repair process further improves.
    Type: Grant
    Filed: January 15, 1997
    Date of Patent: April 21, 1998
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hayami Matsunaga, Masao Iwata, Yoshikazu Suehiro, Hideo Kurokawa, Izumi Okamoto
  • Patent number: 5652462
    Abstract: Two modules, each of which has a plurality of memory IC chips installed therein, are stacked to form a module unit. Furthermore, a plurality of the module units are installed on a mother board so as to form a multilevel semiconductor integrated circuit device. By further stacking a specific module containing an IC chip for replacing the functions of a defective chip, a repair process can be conducted more easily and efficiently. Alternatively, instead of the module units, a plurality of TAB packages stacked in a multilayer structure are installed on the mother board. Outer leads of each of the TAB packages and terminal pads on the circuit board are respectively connected to each other in a one-to-one way. Thus, only a defective TAB package need be taken away and consequently, efficiency in the repair process further improves.
    Type: Grant
    Filed: July 21, 1995
    Date of Patent: July 29, 1997
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hayami Matsunaga, Masao Iwata, Yoshikazu Suehiro, Hideo Kurokawa, Izumi Okamoto
  • Patent number: 5490041
    Abstract: A plurality of memory modules are stacked so as to form a multilayer integrated memory circuit. All of the memory modules have a plurality of bare memory IC chips mounted thereon, and have the same structure, the same circuit configuration and the same terminal arrangement in lead frames with each other. Each of the memory modules to be stacked in each layer is rotated by 90.degree., 180.degree. or 270.degree. before being stacked and connected to each other. Thus, in the multi-layered memory circuit, it is possible that signals can be selectively input/output to/from a particular layer in the multilayer structure, although the lead terminals of each of memory modules has the same configuration and the same arrangement with each other. As a result, a small-size integrated memory circuit device with a large memory-capacity can be provided, which can be fabricated easily and efficiently. A higher processing speed of digital computers can be also achieved.
    Type: Grant
    Filed: April 4, 1994
    Date of Patent: February 6, 1996
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hitonobu Furukawa, Hayami Matsunaga, Yoshikazu Suehiro, Masao Iwata, Takeo Yasuho, Izumi Okamoto, Kazuo Takeda, Shuji Ida