Patents by Inventor Hayato Nakano
Hayato Nakano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11996374Abstract: External connection reliability is improved with an external connector including an external connection terminal, and a nut provided on a bottom surface side of the external connection terminal. The external connection terminal has a conductor, a first metal layer provided on an upper surface of the conductor, a second metal layer provided on the first metal layer, and a bottom surface metal layer provided on a bottom surface of the conductor.Type: GrantFiled: February 19, 2020Date of Patent: May 28, 2024Assignee: FUJI ELECTRIC CO., LTD.Inventors: Hayato Nakano, Shun Sakai
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Publication number: 20240120249Abstract: [Problem] An object of the present invention is to provide a semiconductor module capable of preventing a wire wiring from being broken because of a crack having occurred in sealing resin. [Solution] A semiconductor module 1 includes semiconductor chips 14a to 14d, sealing resin 18 configured to seal the semiconductor chips 14a to 14d, a case 11 including a casting area 117u, first portions 111 and 112, and second portions 113 and 114, wire wirings 101a to 101j and 102a to 102i sealed in the sealing resin 18 while being located closer to the first portion 111 and connected to the semiconductor chips 14a to 14d, and recessed portions 131a, 131b, 132a, and 132b formed on the second portions 113 and 114 between a virtual surface VSu and the first portion 112.Type: ApplicationFiled: August 29, 2023Publication date: April 11, 2024Applicant: FUJI ELECTRIC CO., LTD.Inventor: Hayato NAKANO
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Publication number: 20240079382Abstract: A semiconductor device including a semiconductor chip, an insulating circuit board having a circuit pattern formed on an insulating plate, a case including a frame part having an opening that is substantially rectangular in a plan view of the semiconductor device, inner wall surfaces of the frame part at the opening forming a storage part to store the insulating circuit board, and a printed circuit board which has a flat plate shape and which protrudes from one of the inner wall surfaces of the frame part toward the storage part. The semiconductor device further includes a sealing material filled in the storage part, to thereby seal the semiconductor chip and the printed circuit board. A front surface of the sealing material forms a sealing surface, and in a thickness direction of the semiconductor chip, the sealing surface is higher around the printed circuit board than around the semiconductor chip.Type: ApplicationFiled: November 8, 2023Publication date: March 7, 2024Applicant: FUJI ELECTRIC CO., LTD.Inventor: Hayato NAKANO
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Patent number: 11855049Abstract: A semiconductor device including a semiconductor chip, an insulating circuit board having a circuit pattern formed on an insulating plate, a case including a frame part having an opening that is substantially rectangular in a plan view of the semiconductor device, inner wall surfaces of the frame part at the opening forming a storage part to store the insulating circuit board, and a printed circuit board which has a flat plate shape and which protrudes from one of the inner wall surfaces of the frame part toward the storage part. The semiconductor device further includes a sealing material filled in the storage part, to thereby seal the semiconductor chip and the printed circuit board. A front surface of the sealing material forms a sealing surface, and in a thickness direction of the semiconductor chip, the sealing surface is higher around the printed circuit board than around the semiconductor chip.Type: GrantFiled: March 26, 2021Date of Patent: December 26, 2023Assignee: FUJI ELECTRIC CO., LTD.Inventor: Hayato Nakano
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Publication number: 20230223441Abstract: Provided is a semiconductor device including: a transistor portion provided in a semiconductor substrate; and a diode portion provided in the semiconductor substrate, in which an area ratio of the transistor portion to the diode portion on a front surface of the semiconductor substrate is larger than 3.1 and smaller than 4.7. Provided is a semiconductor module including: a semiconductor device including a transistor portion and a diode portion provided in a semiconductor substrate; an external connection terminal electrically connected to the semiconductor device; and a coupling portion for electrically connecting the semiconductor device and the external connection terminal. The coupling portion may be in plane contact with a front surface electrode of the semiconductor device at a predetermined junction surface. An area ratio of the transistor portion to the diode portion may be larger than 2.8 and smaller than 4.7.Type: ApplicationFiled: March 22, 2023Publication date: July 13, 2023Inventor: Hayato NAKANO
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Publication number: 20230178443Abstract: There are provided a semiconductor module capable of preventing the adhesion of an epoxy resin to a terminal to which at least one of a high current and a high voltage is supplied and a method for manufacturing a semiconductor module. A semiconductor module includes: a case having an inner wall defining a casting region and a peripheral edge portion arranged outside the inner wall; an intermediate terminal arranged in along side portion of a peripheral edge portion and having a fastening surface to which a cable is fastened; a structure arranged in a long side portion of the inner wall to be adjacent to the long side portion where the intermediate terminal is arranged and higher than the fastening surface; and a sealing section formed of an epoxy resin, having weld lines formed close to the side of the structure on a surface, and cast into a casting region to seal transistors.Type: ApplicationFiled: October 24, 2022Publication date: June 8, 2023Applicant: FUJI ELECTRIC CO., LTD.Inventor: Hayato NAKANO
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Publication number: 20230124426Abstract: There is provided a semiconductor module capable of preventing the adhesion of an epoxy resin to terminals to which at least one of a large current and a high voltage is supplied. A semiconductor module includes: a sealing section formed of an epoxy resin and sealing transistors; an intermediate terminal having a fastening surface to which a cable connected to a load as a drive target is fastened in a direction intersecting the thickness direction of a sealing section and connected to the transistors; and a structure arranged between the sealing section and the fastening surface and having an input section higher than a surface of the sealing section and the fastening surface.Type: ApplicationFiled: August 25, 2022Publication date: April 20, 2023Applicant: FUJI ELECTRIC CO., LTD.Inventor: Hayato NAKANO
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Patent number: 11380608Abstract: A semiconductor module includes a substrate on which first, second, and third circuit boards that are electrically isolated from each other are formed; a semiconductor element arranged on the first circuit board; a connecting member that bridges an upper surface electrode of the semiconductor element and the second circuit board so as to electrically connect the upper surface electrode to the second circuit board; a wire that electrically connects the third circuit board to a first electrode that is located outside of where the first, second and third circuit boards are located in a plan view; and a sealing resin that covers and seals the substrate, the semiconductor element, the connecting member, and the wire, wherein the wire is wired from the third circuit board to the first electrode so as to cross the semiconductor element at a vertical position lower than an upper surface of the connecting member.Type: GrantFiled: January 4, 2021Date of Patent: July 5, 2022Assignee: FUJI ELECTRIC CO., LTD.Inventor: Hayato Nakano
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Patent number: 11322436Abstract: A semiconductor module includes: a first metal plate including a first mount part joined with a bottom-surface electrode of a first switching element, a second mount part joined with a positive-electrode terminal, and a first narrow part between the first and second mount parts and being narrower than a part jointing the first switching element to the first mount part and the positive-electrode terminal; a second metal plate being joined with a bottom-surface electrode of a second switching element, and connected to a top-surface electrode of the first switching element; a third metal plate including a sixth mount part joined with a negative-electrode terminal, a seventh mount part connected to a top-surface electrode of the second switching element, and being narrower than the negative-electrode terminal, and a second narrow part between the sixth and seventh mount parts; and a snubber circuit connecting the first and second narrow parts.Type: GrantFiled: September 28, 2020Date of Patent: May 3, 2022Assignee: FUJI ELECTRIC CO., LTD.Inventor: Hayato Nakano
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Patent number: 11315867Abstract: An external connection terminal of a semiconductor module is provided. The external connection terminal includes a conductor having an upper surface and a lower surface; a plated layer configured to cover the upper surface of the conductor; and a nut provided on the lower surface-side of the conductor for receiving a screw penetrating the conductor. The plated layer includes a low contact resistance region overlapping a region in which the nut is provided, and a high contact resistance region that is a region except the low contact resistance region, as seen from above, and the plated layer includes a convex portion and a concave portion on a surface in the high contact resistance region.Type: GrantFiled: January 7, 2020Date of Patent: April 26, 2022Assignee: FUJI ELECTRIC CO., LTD.Inventor: Hayato Nakano
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Publication number: 20210375832Abstract: A semiconductor device including a semiconductor chip, an insulating circuit board having a circuit pattern formed on an insulating plate, a case including a frame part having an opening that is substantially rectangular in a plan view of the semiconductor device, inner wall surfaces of the frame part at the opening forming a storage part to store the insulating circuit board, and a printed circuit board which has a flat plate shape and which protrudes from one of the inner wall surfaces of the frame part toward the storage part. The semiconductor device further includes a sealing material filled in the storage part, to thereby seal the semiconductor chip and the printed circuit board. A front surface of the sealing material forms a sealing surface, and in a thickness direction of the semiconductor chip, the sealing surface is higher around the printed circuit board than around the semiconductor chip.Type: ApplicationFiled: March 26, 2021Publication date: December 2, 2021Applicant: FUJI ELECTRIC CO., LTD.Inventor: Hayato NAKANO
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Publication number: 20210272890Abstract: A semiconductor module includes a substrate on which first, second, and third circuit boards that are electrically isolated from each other are formed; a semiconductor element arranged on the first circuit board; a connecting member that bridges an upper surface electrode of the semiconductor element and the second circuit board so as to electrically connect the upper surface electrode to the second circuit board; a wire that electrically connects the third circuit board to a first electrode that is located outside of where the first, second and third circuit boards are located in a plan view; and a sealing resin that covers and seals the substrate, the semiconductor element, the connecting member, and the wire, wherein the wire is wired from the third circuit board to the first electrode so as to cross the semiconductor element at a vertical position lower than an upper surface of the connecting member.Type: ApplicationFiled: January 4, 2021Publication date: September 2, 2021Applicant: Fuji Electric Co., Ltd.Inventor: Hayato NAKANO
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Patent number: 11069621Abstract: Provided is a semiconductor device including an input terminal including a P terminal and an N terminal; a laminated circuit substrate connected to the input terminal; a power substrate provided above the laminated circuit substrate; a connecting section electrically connecting the laminated circuit substrate and the power substrate; a capacitor provided in a conduction path between the P terminal and the N terminal; and a resistor provided in series with the capacitor in the conduction path between the P terminal and the N terminal. The capacitor may be provided in a region where the input terminal or the connecting section is provided, in an overhead view.Type: GrantFiled: June 3, 2019Date of Patent: July 20, 2021Assignee: FUJI ELECTRIC CO., LTD.Inventor: Hayato Nakano
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Publication number: 20210143147Abstract: A semiconductor module includes: a first metal plate including a first mount part joined with a bottom-surface electrode of a first switching element, a second mount part joined with a positive-electrode terminal, and a first narrow part between the first and second mount parts and being narrower than a part jointing the first switching element to the first mount part and the positive-electrode terminal; a second metal plate being joined with a bottom-surface electrode of a second switching element, and connected to a top-surface electrode of the first switching element; a third metal plate including a sixth mount part joined with a negative-electrode terminal, a seventh mount part connected to a top-surface electrode of the second switching element, and being narrower than the negative-electrode terminal, and a second narrow part between the sixth and seventh mount parts; and a snubber circuit connecting the first and second narrow parts.Type: ApplicationFiled: September 28, 2020Publication date: May 13, 2021Applicant: FUJI ELECTRIC CO., LTD.Inventor: Hayato NAKANO
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Patent number: 10966322Abstract: A semiconductor device includes: a sealed unit that seals a semiconductor element therein; a connection terminal that is electrically connected to the semiconductor element and is provided so as to project outward from the sealed unit; and a pedestal that is provided to surround a bottom part of an exposed portion of the connection terminal that is exposed from the sealed unit. The pedestal has a base attached to the sealed unit and a guide part that has an inclined side face.Type: GrantFiled: January 7, 2019Date of Patent: March 30, 2021Assignee: FUJI ELECTRIC CO., LTD.Inventor: Hayato Nakano
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Publication number: 20200388937Abstract: External connection reliability is improved with an external connector including an external connection terminal, and a nut provided on a bottom surface side of the external connection terminal. The external connection terminal has a conductor, a first metal layer provided on an upper surface of the conductor, a second metal layer provided on the first metal layer, and a bottom surface metal layer provided on a bottom surface of the conductor.Type: ApplicationFiled: February 19, 2020Publication date: December 10, 2020Inventors: Hayato NAKANO, Shun SAKAI
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Patent number: 10784214Abstract: A semiconductor module includes: a first lead frame connected to a plurality of semiconductor chips in a first arm circuit; a second lead frame connected to a plurality of semiconductor chips in a second arm circuit; a first main terminal connected to the first lead frame; and a second main terminal connected to the second lead frame, wherein each of the first lead frame and second lead frame has a facing part, a first terminal connection portion connected to the first main terminal is provided at a first end portion of the first lead frame, a second terminal connection portion connected to the second main terminal is provided at a second end portion of the second lead frame, and the first terminal connection portion and second terminal connection portion are arranged on opposite sides when viewed from the facing parts of the first lead frame and second lead frame.Type: GrantFiled: January 29, 2019Date of Patent: September 22, 2020Assignee: FUJI ELECTRIC CO., LTD.Inventors: Shin Soyano, Hayato Nakano, Keiichi Higuchi, Akihiro Osawa
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Publication number: 20200258834Abstract: An external connection terminal of a semiconductor module is provided. The external connection terminal includes a conductor having an upper surface and a lower surface; a plated layer configured to cover the upper surface of the conductor; and a nut provided on the lower surface-side of the conductor for receiving a screw penetrating the conductor. The plated layer includes a low contact resistance region overlapping a region in which the nut is provided, and a high contact resistance region that is a region except the low contact resistance region, as seen from above, and the plated layer includes a convex portion and a concave portion on a surface in the high contact resistance region.Type: ApplicationFiled: January 7, 2020Publication date: August 13, 2020Inventor: Hayato NAKANO
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Patent number: 10741550Abstract: A reverse-conducting semiconductor device includes a semiconductor chip having a top surface, a first side and a second side orthogonal to the first side in a plan view, in which a plurality of transistor regions and a plurality of diode regions are alternately arranged and an upper-electrode is provided on top surface-sides of the transistor regions and the diode regions; and a wiring member having a flat-plate portion having a rectangular-shape which is metallurgically jointed to the upper-electrode via a joint member above the diode regions. The wiring member has a conductive wall rising from a bending edge of the flat-plate portion in a direction opposite to the upper-electrode, and the bending edge of the flat-plate portion is arranged parallel to the first side.Type: GrantFiled: March 22, 2019Date of Patent: August 11, 2020Assignee: FUJI ELECTRIC CO., LTD.Inventors: Hayato Nakano, Keiichi Higuchi, Akihiro Osawa
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Publication number: 20200006237Abstract: Provided is a semiconductor device including an input terminal including a P terminal and an N terminal; a laminated circuit substrate connected to the input terminal; a power substrate provided above the laminated circuit substrate; a connecting section electrically connecting the laminated circuit substrate and the power substrate; a capacitor provided in a conduction path between the P terminal and the N terminal; and a resistor provided in series with the capacitor in the conduction path between the P terminal and the N terminal. The capacitor may be provided in a region where the input terminal or the connecting section is provided, in an overhead view.Type: ApplicationFiled: June 3, 2019Publication date: January 2, 2020Inventor: Hayato NAKANO