Patents by Inventor Heain KIM

Heain KIM has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Low drop-out (LDO) linear regulator
    Patent number: 11860659
    Abstract: A low drop-out (LDO) linear regulator includes: a pass transistor coupled between an input terminal and an output terminal; an error amplifier suitable for amplifying and outputting a difference between a feedback voltage corresponding to an output voltage of the output terminal and a predetermined reference voltage; a buffer including an input terminal which is coupled to an output node of the error amplifier and an output terminal which is coupled to a gate of the pass transistor; a first compensation circuit suitable for driving an equivalent resistance of the output node of the error amplifier to be in inverse proportion to a load current; and a second compensation circuit suitable for driving an equivalent resistance of an output node of the buffer to be in inverse proportion to the load current.
    Type: Grant
    Filed: December 27, 2021
    Date of Patent: January 2, 2024
    Assignee: SK hynix Inc.
    Inventors: Joongho Choi, Minsu Park, Jiteck Jung, Seungwoo Shin, Chankyu Bae, Kibaek Kwon, Myunsik Kim, Jiwon Son, Heain Kim
  • LOW DROP-OUT (LDO) LINEAR REGULATOR
    Publication number: 20220206521
    Abstract: A low drop-out (LDO) linear regulator includes: a pass transistor coupled between an input terminal and an output terminal; an error amplifier suitable for amplifying and outputting a difference between a feedback voltage corresponding to an output voltage of the output terminal and a predetermined reference voltage; a buffer including an input terminal which is coupled to an output node of the error amplifier and an output terminal which is coupled to a gate of the pass transistor; a first compensation circuit suitable for driving an equivalent resistance of the output node of the error amplifier to be in inverse proportion to a load current; and a second compensation circuit suitable for driving an equivalent resistance of an output node of the buffer to be in inverse proportion to the load current.
    Type: Application
    Filed: December 27, 2021
    Publication date: June 30, 2022
    Inventors: Joongho CHOI, Minsu PARK, Jiteck JUNG, Seungwoo SHIN, Chankyu BAE, Kibaek KWON, Myunsik KIM, Jiwon SON, Heain KIM