Patents by Inventor Hee-Seok Kim

Hee-Seok Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050159017
    Abstract: The present invention provides nitrogenous compositions for forming a silicon nitride layer, wherein the nitrogenous composition comprises a hydrazine compound, an amine compound or a mixture thereof. The present invention further provides source compositions for forming a silicon nitride layer, wherein the source composition comprises a nitrogenous composition comprising a hydrazine compound, an amine compound or a mixture thereof, and a silicon source comprising hexachlorodisilane. Methods for forming silicon nitride layers are further provided. The silicon nitride layers provided herein may be formed on a substrate at a low temperature and may further exhibit improved breakdown voltage and an enhanced etch resistance.
    Type: Application
    Filed: January 7, 2005
    Publication date: July 21, 2005
    Inventors: Jin-Gyun Kim, Jae-Young Ahn, Hee-Seok Kim, Ju-Wan Lim
  • Publication number: 20050148201
    Abstract: A method for forming a low-k dielectric layer for a semiconductor device using an ALD process including (a) forming predetermined interconnection patterns on a semiconductor substrate, (b) supplying a first and a second reactive material to a chamber having the substrate therein, thereby adsorbing the first and second reactive materials on a surface of the substrate, (c) supplying a first gas to the chamber to purge the first and second reactive materials that remain unreacted, (d) supplying a third reactive material to the chamber, thereby causing a reaction between the first and second materials and the third reactive material to form a monolayer, (e) supplying a second gas to the chamber to purge the third reactive material that remains unreacted in the chamber and a byproduct; and (f) repeating (b) through (e) a predetermined number of times to form a SiBN ternary layer having a predetermined thickness on the substrate.
    Type: Application
    Filed: November 5, 2004
    Publication date: July 7, 2005
    Inventors: Jae-Young Ahn, Jin-Gyun Kim, Hee-Seok Kim, Jin-Tae No, Sang-Ryol Yang, Sung-Hae Lee, Hong-Suk Kim, Ju-Wan Lim, Young-Seok Kim, Yong-Woo Hyung, Man-Sug Kang
  • Publication number: 20040259308
    Abstract: A capacitor of a semiconductor device includes a cylinder type capacitor lower electrode, a dielectric layer, and an upper electrode. The upper electrode includes a metallic layer on the dielectric layer and a doped polySi1-xGex layer stacked on the metallic layer. Methods of forming these capacitors also are provided.
    Type: Application
    Filed: April 13, 2004
    Publication date: December 23, 2004
    Inventors: Eun-ae Chung, Ki-hyun Hwang, Jung-hwan Oh, Hyo-jung Kim, Seok-woo Nam, Won-sik Shin, U-in Chung, Young-sun Kim, Hee-seok Kim, Beom-jun Jin
  • Publication number: 20040078266
    Abstract: Disclosed is an advertisement method using a download time of a hand-held terminal. If the terminal connected to a server via a wireless Internet network selects a menu to be downloaded among contents menus that the server provides, the server segments a corresponding contents file of the selected menu based into packets having a predetermined size, the packets are downloaded according to a sequence of the segmentation, and a transmission rate of the corresponding contents file is displayed on an LCD window of the terminal in a shape of progress bar. The advertisement method comprising the steps of: inserting advertisement data between the packets of the selected contents file which is transmitted from the server and transmitting the download packet data and the advertisement data sequentially; and displaying the transmitted advertisement data on a predetermined portion of the LCD window.
    Type: Application
    Filed: November 10, 2003
    Publication date: April 22, 2004
    Inventor: Hee-Seok Kim
  • Patent number: 6534400
    Abstract: Disclosed is a method for depositing a tungsten silicide layer on a wafer coated with a polysilicon layer in a CVD process chamber. A surface of the polysilicon layer is pre-treated by introducing a hydrogen compound gas including any elements among group III elements or group V elements of the periodic table into the CVD process chamber. The tungsten silicide layer is deposited on the polysilicon layer by introducing a silane source gas and a tungsten source gas into the CVD process chamber. Since the surface of the polysilicon layer is pre-treated using the hydrogen compound gas before the tungsten silicide layer is deposited on the polysilicon layer, void generation is prevented on an interfacial surface between the tungsten silicide layer and the polysilicon layer.
    Type: Grant
    Filed: January 3, 2002
    Date of Patent: March 18, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae Young Ahn, Woo Sung Lee, Man Sug Kang, Hee Seok Kim
  • Publication number: 20020137315
    Abstract: Disclosed is a method for depositing a tungsten suicide layer on a wafer coated with a polysilicon layer in a CVD process chamber. A surface of the polysilicon layer is pre-treated by introducing a hydrogen compound gas including any elements among group III elements or group V elements of the periodic table into the CVD process chamber. The tungsten silicide layer is deposited on the polysilicon layer by introducing a silane source gas and a tungsten source gas into the CVD process chamber. Since the surface of the polysilicon layer is pre-treated using the hydrogen compound gas before the tungsten silicide layer is deposited on the polysilicon layer, void generation is prevented on an interfacial surface between the tungsten silicide layer and the polysilicon layer.
    Type: Application
    Filed: January 3, 2002
    Publication date: September 26, 2002
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jae Young Ahn, Woo Sung Lee, Man Sug Kang, Hee Seok Kim
  • Publication number: 20020072197
    Abstract: A method of self-aligned shallow trench isolation and a method of manufacturing a non-volatile memory using the same are disclosed. An oxide layer, a first silicon layer and a nitride layer are successively formed on a semiconductor substrate. By using a single mask, the nitride layer, first silicon layer and oxide layer are etched to form an oxide layer pattern, a first silicon layer pattern and a nitride layer pattern. Subsequently, the upper portion of the substrate adjacent to the first silicon layer pattern is etched to a trench. The first silicon layer pattern and substrate are selectively etched to protrude the oxide layer pattern. The inner surface of the trench is oxidized to form a trench thermal oxide layer. Finally, a field oxide layer that fills up the trench is formed. Since the present invention prevents the sidewalls of the first silicon layer pattern from having a positive slope, a silicon residue does not remain during a subsequent gate etching process.
    Type: Application
    Filed: June 5, 2001
    Publication date: June 13, 2002
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Man-Sug Kang, Byoung-Moon Yoon, Hee-Seok Kim, U-In Chung
  • Patent number: 6025248
    Abstract: A method of forming a capacitor includes the step of forming an electrode on an integrated circuit substrate wherein the electrode covers a first portion of the integrated circuit substrate and wherein the electrode exposes a second portion of the integrated circuit substrate. An etch masking pattern including a plurality of ions is formed on the surface of the electrode wherein the etch masking pattern exposes portions of the surface of the electrode. The exposed portions of the electrode are etched using the etch masking pattern as an etching mask so that recesses are formed in the surface of the electrode thereby increasing a surface area thereof. The etch masking pattern is removed, a dielectric layer is formed on the electrode including the recesses, and a conductive layer is formed on the dielectric layer opposite the electrode.
    Type: Grant
    Filed: October 7, 1997
    Date of Patent: February 15, 2000
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hee-seok Kim, Jae-chul Lee, Hyun-woo Lim, Jae-hyong Lee
  • Patent number: 5677234
    Abstract: Methods of forming semiconductor device active regions include the steps of forming a buffer layer containing a material susceptible to oxidation, such as polycrystalline or amorphous silicon, on a semiconductor substrate. To inhibit any native oxide film on the buffer layer from facilitating the formation of field oxide isolation regions having bird's beaks, the native oxide film is converted to a nitrogen containing film, such as silicon oxynitride, by nitrating the native oxide film. The silicon oxynitride film can be formed by exposing the oxide film to a nitrogen containing plasma, implanting nitrogen ions into the oxide film or annealing the oxide film in a nitrogen containing atmosphere, for example. During the nitrating step, chemically active oxygen in the native oxide film becomes bound to the nitrogen incorporated therein.
    Type: Grant
    Filed: June 18, 1996
    Date of Patent: October 14, 1997
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Bon-young Koo, Byung-hong Chung, Hee-seok Kim, Yun-gi Kim
  • Patent number: 5227322
    Abstract: Disclosed is a method comprising forming a first electrode by forming a conductive layer on a semiconductor substrate, forming an etching mask on the conductive layer, etching the conductive layer and defining the conductive layer into cell units; and forming a dielectric film and a second electrode or the first electrode. Also disclosed is a method comprising forming a first electrode by forming a conductive structure on a semiconductor substrate, forming an etching mask on the conductive structure and etching the conductive structure; and forming a dielectric film and a second electrode on the first electrode. An insulating layer including pin holes such as a silicon nitride layer is formed on the conductive structure or the conductive layer; which is exposed under an oxidative atmosphere. The surface portion of the conductive structure or conductive layer is oxidized to form silicon oxide islands to be used as an etching mask.
    Type: Grant
    Filed: April 14, 1992
    Date of Patent: July 13, 1993
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-hong Ko, Hee-seok Kim, Sung-tae Kim