Abstract: In a GNSS receiver data sequences derived from a digital signal each with an internally generated correlation sequence derived from a basic sequence and mixed with frequency signals corresponding to various Doppler frequencies and in various phase positions with respect to the data sequence are correlated and the correlation values evaluated. In difficult conditions, e.g., RF levels of the signal of ?145 dBm and less, correlation values produced with the same correlation sequence and phase position but with a plurality of data sequences are evaluated together in that, in an evaluator (49), every-correlation value is, in a comparator (52), compared with at least a first value threshold and a second value threshold, with the latter having a value between 1.3 and 1.7 times the value of the first and values ?1, 0 or +1 assigned accordingly to a correlation term which is then added to an integer correlation counter which varies over a counter interval, e.g., [0, 15], in an adding unit (53).

Abstract: In a GNSS receiver data sequences derived from a digital signal each with an internally generated correlation sequence derived from a basic sequence and mixed with frequency signals corresponding to various Doppler frequencies and in various phase positions with respect to the data sequence are correlated and the correlation values evaluated. In difficult conditions, e.g., RF levels of the signal of ?145 dBm and less, correlation values produced with the same correlation sequence and phase position but with a plurality of data sequences are evaluated together in that, in an evaluator (49), every-correlation value is, in a comparator (52), compared with at least a first value threshold and a second value threshold, with the latter having a value between 1.3 and 1.7 times the value of the first and values ?1, 0 or +1 assigned accordingly to a correlation term which is then added to an integer correlation counter which varies over a counter interval, e.g., [0, 15], in an adding unit (53).

Abstract: A sychronization circuit comprising an analog feedback shift register for generating an internal sequence which is synchronized with an external sequence containing repetitions of a fundamental sequence has a feedback circuit which, for the formation of a new value of a fundamental sequence, combines at least two values (x1,x2) stored in the shift register according to a feedback function (f(x1,x2)), which is then scaled with a factor k, 0.9<k<0.99. The synchronization behaviour is improved, especially in the case of signals with strong background noise, by using a feedback function which is substantially linear in the sectors defined by the signs of the arguments and whose sign corresponds to that of the negative of the product of the negative arguments and whose magnitude is 1 if the magnitudes of the arguments are each 1. A function which meets these requirements and has proved useful is f(x1, . . . , xm)=?sig((?x1)· . . . ·(?xm))·(|x1|+ . . . +|xm|)/m.

Abstract: A method for generating an internal sequence of analog values having a specific period includes producing an intermediate value by a logical combination of an actual value of the external sequence with an actual value of a second generating sequence, producing an input value to an analog feedback shift register by superposition of the intermediate value with an analog feedback value derived according to a feedback function from analog values in the analog feedback shift register, and feeding the input value to an input of the analog feedback shift register. A position of an actual value of the second generating sequence corresponds to a position of a segment in the first generating sequence, the segment including a determinative set of n binary values derived from the analog values in the analog feedback shift register.

Abstract: For allowing positioning of a GPS receiver within a building, GPS primary positioning signals received by an outdoor receive antenna are up-converted to different carrier frequencies in the 2.4 GHz ISM band and the converted signals are transmitted each by a transmit antenna inside the building, the transmit antennas serving at the same time as access points of a WLAN which is used for transmitting additional positioning data like the positions of the transmit antennas and the signal delay times associated with them. By cycling through the secondary positioning signals received from the transmit antennas, i.e., down-converting each of them during an assigned time slot, and determining clock bias differences in the receiver, the position of the latter is determined using TDOA algorithms.

Abstract: For allowing positioning of a GPS receiver within a building, GPS primary positioning signals received by an outdoor receive antenna are up-converted to different carrier frequencies in the 2.4 GHz ISM band and the converted signals are transmitted each by a transmit antenna inside the building, the transmit antennas serving at the same time as access points of a WLAN which is used for transmitting additional positioning data like the positions of the transmit antennas and the signal delay times associated with them. By cycling through the secondary positioning signals received from the transmit antennas, i.e., down-converting each of them during an assigned time slot, and determining clock bias differences in the receivers the position of the latter is determined using TDOA algorithms.

Abstract: A GPS receiver comprises, for each satellite, synchronization circuits for local generation of an internal sequence corresponding to the external sequence derived from the received signal and synchronized with said sequence, which circuits each comprise an analog shift register (25), fed back via a feedback circuit (26), a gain block (27) and an adder (24), for generating the first of m-sequences generating a Gold sequence, and a memory (29) which contains the elements of the second generating m-sequence, which can be read out with a determinative set derived from the values stored in the shift register (25) as address. In a logic element (23), the value read out is logically combined with the next element of the external sequence for generating a value substantially corresponding to the next element of the first m-sequence, and the result is superposed with the feedback value in the adder (24).

Abstract: A sychronization circuit comprising an analog feedback shift register for generating an internal sequence which is synchronized with an external sequence containing repetitions of a fundamental sequence has a feedback circuit which, for the formation of a new value of a fundamental sequence, combines at least two values (x1,x2) stored in the shift register according to a feedback function (f(x1,x2)), which is then scaled with a factor k, 0.9<k<0.99. The synchronization behaviour is improved, especially in the case of signals with strong background noise, by using a feedback function which is substantially linear in the sectors defined by the signs of the arguments and whose sign corresponds to that of the negative of the product of the negative arguments and whose magnitude is 1 if the magnitudes of the arguments are each 1. A function which meets these requirements and has proved useful is f(x1, . . . ,xm)=−sig((−x1)· . . .