Abstract: Embodiments of the invention relate to a method for fabricating a semiconductor structure comprising a semiconductor material, and a semiconductor substrate fabricated from the method. The method can include a step of providing a template structure. The template structure can comprise an opening, a cavity and a seed structure. The seed structure can comprise a seed material and a seed surface. An inner surface of the template structure can comprise at least one metallic surface area comprising a metallic material. The embodied method further comprises a step of growing the semiconductor structure within the cavity of the template structure from the seed surface along the metallic surface area.

Abstract: A method for fabricating a metastable crystalline structure is provided. The method includes providing a base substrate, wherein the base substrate comprises an insulating layer. The method further includes providing a metastable seed crystal on the base substrate, wherein the metastable seed crystal has a predefined metastable crystal phase or a predefined metastable composition. The method further includes forming a template structure above the base substrate, wherein the template structure covers at least a part of the metastable seed crystal. The method further includes growing the metastable crystalline structure with the predefined metastable crystal phase or the predefined metastable composition of the seed crystal inside the template structure. The growing of the metastable crystalline structure is nucleated from the seed crystal. Crystalline structures produced by the methods described herein are also provided.

Abstract: Embodiments of the invention relate to a method for fabricating a semiconductor structure comprising a semiconductor material, and a semiconductor substrate fabricated from the method. The method can include a step of providing a template structure. The template structure can comprise an opening, a cavity and a seed structure. The seed structure can comprise a seed material and a seed surface. An inner surface of the template structure can comprise at least one metallic surface area comprising a metallic material. The embodied method further comprises a step of growing the semiconductor structure within the cavity of the template structure from the seed surface along the metallic surface area.

Abstract: A wheel information transfer apparatus, including: an information detection apparatus to detect and store wheel-related information; and an information transfer apparatus to transfer the wheel-related information over a transfer medium; in which the information transfer apparatus is configured to transfer at least a first portion of the wheel-related information parallel or quasi-parallel, and in which the information transfer apparatus is configured to transfer the at least first portion of the wheel-related information or a second portion of the wheel-related information serially within the parallel or quasi-parallel data transfer. Also described are a wheel information transfer method and a related vehicle.

Abstract: A sensor for detecting a physical variable in dependence on an alignment of the sensor around an axis of the sensor, including: a sensor body having a predetermined first shape feature on an outer surface of the sensor body for enabling a predetermined alignment of the sensor around the axis. Also described is a related system with the sensor.

Abstract: A vehicle rotational speed sensor has a sensor element, a cylindrical sensor housing in which the sensor element is accommodated, an electrical connection cable which is guided out of the sensor housing, and a bend limiting element. The bend limiting element is configured to limit a radius of curvature of the connection cable directly in a region in which the connection cable is guided out of the cylindrical sensor housing.

Abstract: Techniques that can facilitate high-transparency semiconductor-metal interfaces are provided. In one example, a method can comprise forming a silicon on insulator (SOI) over a wafer. The method can further comprise depositing a metal on the SOI. The method can further comprise forming a structure by dry-etching the metal and dry-etching the SOI. The method can further comprise forming a template over the structure. The method can further comprise etching a portion of the SOI for removal under the metal. The method can further comprise growing a semiconductor where the portion of SOI was removed.

Abstract: A method for fabricating a metastable crystalline structure is provided. The method includes providing a base substrate, wherein the base substrate comprises an insulating layer. The method further includes providing a metastable seed crystal on the base substrate, wherein the metastable seed crystal has a predefined metastable crystal phase or a predefined metastable composition. The method further includes forming a template structure above the base substrate, wherein the template structure covers at least a part of the metastable seed crystal. The method further includes growing the metastable crystalline structure with the predefined metastable crystal phase or the predefined metastable composition of the seed crystal inside the template structure. The growing of the metastable crystalline structure is nucleated from the seed crystal. Crystalline structures produced by the methods described herein are also provided.

Abstract: A method for manufacturing a semiconductor structure comprises the steps of: providing a substrate including a first semiconductor material; forming a dielectric layer on a surface of the substrate; forming an opening in the dielectric layer having a bottom reaching the substrate; providing a second semiconductor material in the opening and on the substrate, the second semiconductor material being en-capsulated by a further dielectric material thereby forming a filled cavity; melting the second semiconductor material in the cavity; recrystallizing the second semi-conductor material in the cavity; laterally removing the second semiconductor material at least partially for forming a lateral surface at the second semiconductor material; and forming a third semiconductor material on the lateral surface of the second semiconductor material, wherein the third semiconductor material is different from the second semiconductor material.

Abstract: A plasmonic quantum well laser may be provided. The plasmonic quantum well laser includes a plasmonic waveguide and a p-n junction structure extends orthogonally to a direction of plasmon propagation along the plasmonic waveguide. Thereby, the p-n junction is positioned atop a dielectric material having a lower refractive index than material building the p-n junction, and the quantum well laser is electrically actuated. A method for building the plasmonic quantum well laser is also provided.

Abstract: A method for fabricating a semiconductor substrate comprises providing a crystalline base substrate, forming an insulating layer on the crystalline base substrate and forming a trench in the insulating layer. This exposes a seed surface of the base substrate. The trench has sidewalls and a bottom. The bottom corresponds to the seed surface of the base substrate. The method further comprises growing, at a first growth step, an elongated seed structure in the trench from the seed surface of the substrate and forming a cavity structure above the insulating layer. The cavity structure covers the elongated seed structure and extends laterally to the elongated seed structure. The method comprises a further step of growing, at a second growth step, the semiconductor substrate in the cavity structure from the elongated seed structure. The invention is notably also directed to corresponding semiconductor structures and corresponding semiconductor substrates.

Abstract: Methods are provided for fabricating semiconductor nanowires on a substrate. A nanowire template is formed on the substrate. The nanowire template defines an elongate tunnel which extends, laterally over the substrate, between an opening in the template and a seed surface. The seed surface is exposed to the tunnel and of an area up to about 2×104 nm2. The semiconductor nanowire is selectively grown, via said opening, in the template from the seed surface. The area of the seed surface is preferably such that growth of the nanowire proceeds from a single nucleation point on the seed surface. There is also provided a method for fabricating a plurality of semiconductor nanowires on a substrate and a semiconductor nanowire and substrate structure.

Abstract: An electrical junction comprising a first pair of leads and a second pair of leads. The first pair of leads and the second pair of leads comprise a Weyl semimetal. The junction comprises an electrical crossing arranged between the leads of the first pair and the leads of the second pair and is configured to provide an electrical connection between the leads of the first pair and the leads of the second pair. A related electrical device and a related neural network may be also presented.

Abstract: An electrical junction comprising a first pair of leads and a second pair of leads. The first pair of leads and the second pair of leads comprise a Weyl semimetal. The junction comprises an electrical crossing arranged between the leads of the first pair and the leads of the second pair and is configured to provide an electrical connection between the leads of the first pair and the leads of the second pair. A related electrical device and a related neural network may be also presented.

Abstract: A plasmonic quantum well laser may be provided. The plasmonic quantum well laser includes a plasmonic waveguide and a p-n junction structure extends orthogonally to a direction of plasmon propagation along the plasmonic waveguide. Thereby, the p-n junction is positioned atop a dielectric material having a lower refractive index than material building the p-n junction, and the quantum well laser is electrically actuated. A method for building the plasmonic quantum well laser is also provided.

Abstract: A method for fabricating a semiconductor substrate comprises providing a crystalline base substrate, forming an insulating layer on the crystalline base substrate and forming a trench in the insulating layer. This exposes a seed surface of the base substrate. The trench has sidewalls and a bottom. The bottom corresponds to the seed surface of the base substrate. The method further comprises growing, at a first growth step, an elongated seed structure in the trench from the seed surface of the substrate and forming a cavity structure above the insulating layer. The cavity structure covers the elongated seed structure and extends laterally to the elongated seed structure. The method comprises a further step of growing, at a second growth step, the semiconductor substrate in the cavity structure from the elongated seed structure. The invention is notably also directed to corresponding semiconductor structures and corresponding semiconductor substrates.

Abstract: A plasmonic quantum well laser may be provided. The plasmonic quantum well laser includes a plasmonic waveguide and a p-n junction structure extends orthogonally to a direction of plasmon propagation along the plasmonic waveguide. Thereby, the p-n junction is positioned atop a dielectric material having a lower refractive index than material building the p-n junction, and the quantum well laser is electrically actuated. A method for building the plasmonic quantum well laser is also provided.

Abstract: Methods are provided for fabricating a semiconductor junction. A first semiconductor structure is selectively grown in a nanotube, which extends laterally over a substrate, from a seed extending within the nanotube. The seed is removed to expose the first semiconductor structure and create a cavity in the nanotube. A second semiconductor structure is selectively grown in the cavity from the first semiconductor structure, thereby forming a semiconductor junction between the first and second structures.

Abstract: An electrical junction comprising a first pair of leads and a second pair of leads. The first pair of leads and the second pair of leads comprise a Weyl semimetal. The junction comprises an electrical crossing arranged between the leads of the first pair and the leads of the second pair and is configured to provide an electrical connection between the leads of the first pair and the leads of the second pair. A related electrical device and a related neural network may be also presented.

Abstract: A method of fabrication of an array of optoelectronic structures includes first providing a crystalline substrate having cells corresponding to individual optoelectronic structures to be obtained. Each of the cells includes an opening to the substrate. Then, several first layer portions of a first compound semiconductor material are grown in each the opening to at least partly fill a respective one of the cells and form an essentially planar film portion therein. Next, several second layer portions of a second compound semiconductor material are grown over the first layer portions that coalesce to form a coalescent film extending over the first layer portions. Finally, excess portions of materials are removed, to obtain the array of optoelectronic structures. Each optoelectronic structure comprises a stack protruding from the substrate of: a residual portion of one of the second layer portions; and a residual portion of one of the first layer portions.