Abstract: Method and apparatus for cleaning a substrate having a plurality of high-aspect ratio openings are disclosed. A substrate can be provided in a plasma processing chamber, where the substrate includes the plurality of high-aspect ratio openings, the plurality of high-aspect ratio openings are defined by vertical structures having alternating layers of oxide and nitride or alternating layers of oxide and polysilicon. The substrate can include a silicon oxide layer over a damaged or amorphous silicon layer in the high-aspect ratio openings. To remove the silicon oxide layer, a bias power can be applied in the plasma processing chamber at a low pressure, and a fluorine-based species can be used to etch the silicon oxide layer. To remove the underlying damaged or amorphous silicon layer, a source power and a bias power can be applied in the plasma processing chamber, and a hydrogen-based species can be used to etch the damaged or amorphous silicon layer.

Abstract: Method and apparatus for cleaning a substrate having a plurality of high-aspect ratio openings are disclosed. A substrate can be provided in a plasma processing chamber, where the substrate includes the plurality of high-aspect ratio openings, the plurality of high-aspect ratio openings are defined by vertical structures having alternating layers of oxide and nitride or alternating layers of oxide and polysilicon. The substrate can include a silicon oxide layer over a damaged or amorphous silicon layer in the high-aspect ratio openings. To remove the silicon oxide layer, a bias power can be applied in the plasma processing chamber at a low pressure, and a fluorine-based species can be used to etch the silicon oxide layer. To remove the underlying damaged or amorphous silicon layer, a source power and a bias power can be applied in the plasma processing chamber, and a hydrogen-based species can be used to etch the damaged or amorphous silicon layer.

Abstract: An etch layer underlying a patterned photoresist mask is provided. A plurality of sidewall forming processes are performed. Each sidewall forming process comprises depositing a protective layer on the patterned photoresist mask by performing multiple cyclical depositions. Each cyclical deposition involves at least a depositing phase for depositing a deposition layer over surfaces of the patterned photoresist mask and a profile shaping phase for shaping vertical surfaces in the deposition layer. Each sidewall forming process further comprises a breakthrough etch for selectively etching horizontal surfaces of the protective layer with respect to vertical surfaces of the protective layer. Afterwards, the etch layer is etched to form a feature having a critical dimension that is less than the critical dimension of the features in the patterned photoresist mask.

Abstract: An etch layer underlying a patterned photoresist mask is provided. A plurality of sidewall forming processes are performed. Each sidewall forming process comprises depositing a protective layer on the patterned photoresist mask by performing multiple cyclical depositions. Each cyclical deposition involves at least a depositing phase for depositing a deposition layer over surfaces of the patterned photoresist mask and a profile shaping phase for shaping vertical surfaces in the deposition layer. Each sidewall forming process further comprises a breakthrough etch for selectively etching horizontal surfaces of the protective layer with respect to vertical surfaces of the protective layer. Afterwards, the etch layer is etched to form a feature having a critical dimension that is less than the critical dimension of the features in the patterned photoresist mask.

Abstract: This invention is directed to processes for making substituted thiazoles. The substituted thiazole, ethyl 2-(4-hydroxyphenyl)-4-methyl-1,3-thiazole-5-carboxylate, also known as TEI-6720, is useful for treatment of gout and hyperuricemia. This compound belongs to a class of substituted thiazoles that inhibit xanthine oxidase and thus block uric acid production.

Abstract: A method of forming a feature in a low-k dielectric layer is provided. A low-k dielectric layer is placed over a substrate. A patterned photoresist mask is placed over the low-k dielectric layer. At least one feature is etched into the low-k dielectric layer. A CO conditioning is preformed on the at least one feature after the at least one feature is etched. The patterned photoresist mask is stripped after the CO conditioning.

Abstract: A two-step process is disclosed for stripping photoresist material from a substrate, wherein the substrate includes a low k dielectric material underlying the photoresist material and a polymer film overlying both the photoresist material and the low k dielectric material. The first step of the two-step process uses an oxygen plasma to remove the polymer film. The second step of the two-step process uses an ammonia plasma to remove the photoresist material, wherein the second step commences after completion of the first step. Each step of the two-step photoresist stripping process is respectively defined by particular values for process parameters including chemistry, temperature, pressure, gas flow rate, radio frequency power and frequency, and duration.

Abstract: A method of stripping an integrated circuit (IC) structure having a photoresist material and an organosilicate glass (OSG) material is described. The method comprises feeding a nitrous oxide (N2O) gas into a reactor, generating a plasma in the reactor and stripping the photoresist. The stripping process provides a high selectivity between the photoresist and the OSG material.

Abstract: A two-step process is disclosed for stripping photoresist material from a substrate, wherein the substrate includes a low k dielectric material underlying the photoresist material and a polymer film overlying both the photoresist material and the low k dielectric material. The first step of the two-step process uses an oxygen plasma to remove the polymer film. The second step of the two-step process uses an ammonia plasma to remove the photoresist material, wherein the second step commences after completion of the first step. Each step of the two-step photoresist stripping process is respectively defined by particular values for process parameters including chemistry, temperature, pressure, gas flow rate, radio frequency power and frequency, and duration.

Abstract: A method of etching a barrier layer in an integrated circuit (IC) wherein said barrier layer is composed of silicon nitride or silicon carbide. The method comprises receiving an etched IC structure having an exposed barrier layer. The method then proceeds to apply an etchant gas mixture comprising a nitrous oxide (N2O) gas and a fluoromethane (CH3F) gas. The etchant gas mixture provides a relatively high selectivity between the barrier layer to an adjacent dielectric layer.

Abstract: A method for etching a feature in a layer is provided. An underlayer of a polymer material is formed over the layer. A top image layer is formed over the underlayer. The top image layer is exposed to patterned radiation. A pattern is developed in the top image layer. The pattern is transferred from the top image layer to the underlayer with a reducing dry etch. The layer is etched through the underlayer, where the top image layer is completely removed and the underlayer is used as a pattern mask during the etching the layer to transfer the pattern from the underlayer to the layer.

Abstract: A method for etching a trench to a trench depth in a dielectric layer over a substrate is provided. An ARC is applied over the dielectric layer. A photoresist mask is formed on the ARC, where the photoresist mask has a thickness. The ARC is etched through. A trench is etched into the dielectric layer with a dielectric to photoresist etch selectivity between 1:1 and 2:1.

Abstract: In a plasma processing system, a method of minimizing the differences in an etch rate of a photo resist material in different regions of a substrate is disclosed. The method includes introducing the substrate having in sequential order thereon, an underlying layer and the photo-resist layer. The method also includes flowing the etchant gas mixture into a plasma reactor of the plasma processing system, the etchant gas mixture comprising a flow of a fluorine containing gas between about 0.1% and about 10% of the etchant gas mixture. The method further includes striking a plasma from the gas mixture; etching the photo-resist layer with the plasma; and, removing the substrate from the plasma reactor.

Abstract: A method for generating an organic plug within a via is described. The via resides in an integrated circuit (IC) structure having a silicon containing dielectric material. The method for generating the organic plug includes applying an organic compound such as a bottom antireflective coating. The organic compound occupies the via. The method then proceeds to feed a nitrous oxide (N2O) gas into a reactor and generates a plasma in the reactor. A significant portion of the organic compound is removed leaving behind an organic plug to occupy the via. The organic plug is typically generated during dual damascene processing.

Abstract: A method of removing a photoresist layer from an integrated circuit (IC) structure having an etched dielectric material with an exposed barrier layer that covers a copper interconnect. The barrier layer is composed of a material such as silicon nitride or silicon carbide. The method includes feeding a gas mixture that compromises carbon monoxide (CO) into a reactor. A plasma is then generated within the reactor. The photoresist layer is then selectively removed with little or no etching of the exposed barrier layer.

Abstract: A method for etching a trench to a trench depth in a dielectric layer over a substrate is provided. An ARC is applied over the dielectric layer. A photoresist mask is formed on the ARC, where the photoresist mask has a thickness. The ARC is etched through. A trench is etched into the dielectric layer with a dielectric to photoresist etch selectivity between 1:1 and 2:1.

Abstract: A method of stripping an integrated circuit (IC) structure having a photoresist material and an organosilicate glass (OSG) material is described. The method comprises feeding a nitrous oxide (N2O) gas into a reactor, generating a plasma in the reactor and stripping the photoresist. The stripping process provides a high selectivity between the photoresist and the OSG material.

Abstract: A method of etching a barrier layer in an integrated circuit (IC) wherein said barrier layer is composed of silicon nitride or silicon carbide. The method comprises receiving an etched IC structure having an exposed barrier layer. The method then proceeds to apply an etchant gas mixture comprising a nitrous oxide (N2O) gas and a fluoromethane (CH3F) gas. The etchant gas mixture provides a relatively high selectivity between the barrier layer to an adjacent dielectric layer.

Abstract: A method for generating an organic plug within a via is described. The via resides in an integrated circuit (IC) structure having a silicon containing dielectric material. The method for generating the organic plug includes applying an organic compound such as a bottom antireflective coating. The organic compound occupies the via. The method then proceeds to feed a nitrous oxide (N2O) gas into a reactor and generates a plasma in the reactor. A significant portion of the organic compound is removed leaving behind an organic plug to occupy the via. The organic plug is typically generated during dual damascene processing.

Abstract: This invention is directed to processes for making substituted thiazoles. The substituted thiazole, ethyl 2-(4-hydroxyphenyl)-4-methyl-1,3-thiazole-5-carboxylate, also known as TEI-6720, is useful for treatment of gout and hyperuricemia. This compound belongs to a class of substituted thiazoles that inhibit xanthine oxidase and thus block uric acid production.