Patents by Inventor Helmut Oefner

Helmut Oefner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9972488
    Abstract: A method of reducing defects in an epitaxial layer. The method includes forming one or more barrier structures within a peripheral edge region of a wafer substrate, and forming an epitaxial layer over a surface of the wafer substrate.
    Type: Grant
    Filed: March 10, 2016
    Date of Patent: May 15, 2018
    Assignee: Infineon Technologies AG
    Inventors: Hans-Joachim Schulze, Helmut Oefner, Johannes Baumgartl
  • Patent number: 9972704
    Abstract: A method for forming a semiconductor device comprises implanting a defined dose of protons into a semiconductor substrate and tempering the semiconductor substrate according to a defined temperature profile. At least one of the defined dose of protons and the defined temperature profile is selected depending on a carbon-related parameter indicating information on a carbon concentration within at least a part of the semiconductor substrate.
    Type: Grant
    Filed: November 9, 2015
    Date of Patent: May 15, 2018
    Assignee: Infineon Technologies AG
    Inventors: Moriz Jelinek, Johannes Georg Laven, Helmut Oefner, Hans-Joachim Schulze, Werner Schustereder
  • Publication number: 20180102423
    Abstract: A semiconductor device includes at least one transistor structure. The at least one transistor structure includes an emitter or source terminal, and a collector or drain terminal. A carbon concentration within a semiconductor substrate region located between the emitter or source terminal and the collector or drain terminal varies between the emitter or source terminal and the collector or drain terminal.
    Type: Application
    Filed: December 4, 2017
    Publication date: April 12, 2018
    Inventors: Hans-Joachim Schulze, Moriz Jelinek, Johannes Laven, Helmut Oefner, Werner Schustereder
  • Publication number: 20180097064
    Abstract: A method of manufacturing a silicon wafer is provided that includes extracting an n-type silicon ingot over an extraction time period from the a silicon melt comprising n-type dopants; adding p-type dopants to the silicon melt over at least part of the extraction time period, thereby compensating an n-type doping in the n-type silicon ingot by 10% to 80%; slicing the silicon ingot; forming hydrogen related donors in the silicon wafer by irradiating the silicon wafer with protons; and annealing the silicon wafer subsequent to the forming of the hydrogen related donors in the silicon wafer.
    Type: Application
    Filed: November 22, 2017
    Publication date: April 5, 2018
    Applicant: Infineon Technologies AG
    Inventors: Nico CASPARY, Helmut OEFNER, Hans-Joachim SCHULZE
  • Patent number: 9934988
    Abstract: Disclosed is a method for processing a semiconductor wafer. The method includes forming an oxygen containing region in the semiconductor wafer, wherein forming the oxygen containing region includes introducing oxygen via a first surface into the semiconductor wafer. The method further includes creating vacancies at least in the oxygen containing region and annealing at least the oxygen containing region in an annealing process so as to form oxygen precipitates.
    Type: Grant
    Filed: December 14, 2016
    Date of Patent: April 3, 2018
    Assignee: Infineon Technologies AG
    Inventors: Werner Schustereder, Helmut Oefner, Hans-Joachim Schulze, Sandeep Walia
  • Publication number: 20180088042
    Abstract: A method of determining the carbon content in a silicon sample may include: generating electrically active polyatomic complexes within the silicon sample. Each polyatomic complex may include at least one carbon atom. The method may further include: determining a quantity indicative of the content of the generated polyatomic complexes in the silicon sample, and determining the carbon content in the silicon sample from the determined quantity.
    Type: Application
    Filed: September 27, 2017
    Publication date: March 29, 2018
    Inventors: Naveen Goud GANAGONA, Moriz JELINEK, Helmut OEFNER, Hans-Joachim SCHULZE, Werner SCHUSTEREDER
  • Publication number: 20180002826
    Abstract: In accordance with a method of manufacturing CZ silicon wafers, a parameter of at least two of the CZ silicon wafers is measured. A group of the CZ silicon wafers falling within a tolerance of a target specification is determined. The group of the CZ silicon wafers is divided into sub-groups taking into account the measured parameter. An average value of the parameter of the CZ silicon wafers of each sub-group differs among the sub-groups, and a tolerance of the parameter of the CZ silicon wafers of each sub-group is smaller than a tolerance of the parameter of the target specification. A labeling configured to distinguish between the CZ silicon wafers of different sub-groups is prepared. The CZ silicon wafers falling within the tolerance of the target specification are packaged.
    Type: Application
    Filed: June 29, 2017
    Publication date: January 4, 2018
    Applicant: Infineon Technologies AG
    Inventors: Johannes Freund, Thomas Wuebben, Helmut Oefner, Hans-Joachim Schulze
  • Patent number: 9853137
    Abstract: A method for forming a semiconductor device comprises implanting a defined dose of protons into a semiconductor substrate and tempering the semiconductor substrate according to a defined temperature profile. At least one of the defined dose of protons and the defined temperature profile is selected depending on a carbon-related parameter indicating information on a carbon concentration within at least a part of the semiconductor substrate.
    Type: Grant
    Filed: November 9, 2015
    Date of Patent: December 26, 2017
    Assignee: Infineon Technologies AG
    Inventors: Moriz Jelinek, Johannes Georg Laven, Helmut Oefner, Hans-Joachim Schulze, Werner Schustereder
  • Publication number: 20170316929
    Abstract: A method for manufacturing a substrate wafer 100 includes providing a device wafer (110) having a first side (111) and a second side (112); subjecting the device wafer (110) to a first high temperature process for reducing the oxygen content of the device wafer (110) at least in a region (112a) at the second side (112); bonding the second side (112) of the device wafer (110) to a first side (121) of a carrier wafer (120) to form a substrate wafer (100); processing the first side (101) of the substrate wafer (100) to reduce the thickness of the device wafer (110); subjecting the substrate wafer (100) to a second high temperature process for reducing the oxygen content at least of the device wafer (110); and at least partially integrating at least one semiconductor component (140) into the device wafer (110) after the second high temperature process.
    Type: Application
    Filed: July 14, 2017
    Publication date: November 2, 2017
    Inventors: Helmut Oefner, Nico Caspary, Mohammad Momeni, Reinhard Ploss, Francisco Javier Santos Rodriguez, Hans-Joachim Schulze
  • Patent number: 9779931
    Abstract: An embodiment of a method of manufacturing semiconductor wafers comprises determining at least one material characteristic for at least two positions of a semiconductor ingot. A notch or a flat is formed in a semiconductor ingot extending along an axial direction. A plurality of markings is formed in the semiconductor ingot. At least some of the plurality of markings at different positions along the axial direction are distinguishable from each other by a characteristic feature set depending on the at least one material characteristic. The semiconductor ingot is then sliced into semiconductor wafers.
    Type: Grant
    Filed: October 8, 2015
    Date of Patent: October 3, 2017
    Assignee: Infineon Technologies AG
    Inventors: Johannes Freund, Helmut Oefner, Hans-Joachim Schulze
  • Publication number: 20170263440
    Abstract: A method of reducing defects in an epitaxial layer. The method includes forming one or more barrier structures within a peripheral edge region of a wafer substrate, and forming an epitaxial layer over a surface of the wafer substrate.
    Type: Application
    Filed: March 10, 2016
    Publication date: September 14, 2017
    Applicant: Infineon Technologies AG
    Inventors: Hans-Joachim Schulze, Helmut Oefner, Johannes Baumgartl
  • Patent number: 9754787
    Abstract: A Magnetic Czochralski semiconductor wafer having opposing first and second sides arranged distant from one another in a first vertical direction is treated by implanting first particles into the semiconductor wafer via the second side to form crystal defects in the semiconductor wafer. The crystal defects have a maximum defect concentration at a first depth. The semiconductor wafer is heated in a first thermal process to form radiation induced donors. Implantation energy and dose are chosen such that the semiconductor wafer has, after the first thermal process, an n-doped semiconductor region arranged between the second side and first depth, and the n-doped semiconductor region has, in the first vertical direction, a local maximum of a net doping concentration between the first depth and second side and a local minimum of the net doping concentration between the first depth and first maximum.
    Type: Grant
    Filed: June 24, 2014
    Date of Patent: September 5, 2017
    Assignee: Infineon Technologies AG
    Inventors: Johannes Laven, Hans-Joachim Schulze, Stephan Voss, Alexander Breymesser, Alexander Susiti, Shuhai Liu, Helmut Oefner
  • Patent number: 9728395
    Abstract: A method for manufacturing a substrate wafer 100 includes providing a device wafer (110) having a first side (111) and a second side (112); subjecting the device wafer (110) to a first high temperature process for reducing the oxygen content of the device wafer (110) at least in a region (112a) at the second side (112); bonding the second side (112) of the device wafer (110) to a first side (121) of a carrier wafer (120) to form a substrate wafer (100); processing the first side (101) of the substrate wafer (100) to reduce the thickness of the device wafer (110); subjecting the substrate wafer (100) to a second high temperature process for reducing the oxygen content at least of the device wafer (110); and at least partially integrating at least one semiconductor component (140) into the device wafer (110) after the second high temperature process.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: August 8, 2017
    Assignee: Infineon Technologies AG
    Inventors: Helmut Oefner, Nico Caspary, Mohammad Momeni, Reinhard Ploss, Francisco Javier Santos Rodriguez, Hans-Joachim Schulze
  • Patent number: 9728627
    Abstract: A method for forming a semiconductor device comprises implanting a defined dose of protons into a semiconductor substrate and tempering the semiconductor substrate according to a defined temperature profile. At least one of the defined dose of protons and the defined temperature profile is selected depending on a carbon-related parameter indicating information on a carbon concentration within at least a part of the semiconductor substrate.
    Type: Grant
    Filed: November 9, 2015
    Date of Patent: August 8, 2017
    Assignee: Infineon Technologies AG
    Inventors: Moriz Jelinek, Johannes Georg Laven, Helmut Oefner, Hans-Joachim Schulze, Werner Schustereder
  • Patent number: 9721907
    Abstract: A wafer that includes a front surface, a back surface, and an edge between the front surface and the back surface having a curved edge profile between an edge of the front surface and a side face of the edge of the wafer. The edge profile includes a first convex curve that joins the edge of the front surface, a second convex curve that joins the side face, and an intermediate concave curve that joins the first convex curve and the second convex curve.
    Type: Grant
    Filed: November 18, 2015
    Date of Patent: August 1, 2017
    Assignee: Infineon Technologies AG
    Inventors: Helmut Oefner, Hans-Joachim Schulze
  • Publication number: 20170170028
    Abstract: Disclosed is a method for processing a semiconductor wafer. The method includes forming an oxygen containing region in the semiconductor wafer, wherein forming the oxygen containing region includes introducing oxygen via a first surface into the semiconductor wafer. The method further includes creating vacancies at least in the oxygen containing region and annealing at least the oxygen containing region in an annealing process so as to form oxygen precipitates.
    Type: Application
    Filed: December 14, 2016
    Publication date: June 15, 2017
    Inventors: Werner Schustereder, Helmut Oefner, Hans-Joachim Schulze, Sandeep Walia
  • Publication number: 20170141049
    Abstract: A wafer that includes a front surface, a back surface, and an edge between the front surface and the back surface having a curved edge profile between an edge of the front surface and a side face of the edge of the wafer. The edge profile includes a first convex curve that joins the edge of the front surface, a second convex curve that joins the side face, and an intermediate concave curve that joins the first convex curve and the second convex curve.
    Type: Application
    Filed: November 18, 2015
    Publication date: May 18, 2017
    Inventors: Helmut Oefner, Hans-Joachim Schulze
  • Publication number: 20170103882
    Abstract: An embodiment of a method of manufacturing semiconductor wafers comprises determining at least one material characteristic for at least two positions of a semiconductor ingot. A notch or a flat is formed in a semiconductor ingot extending along an axial direction. A plurality of markings is formed in the semiconductor ingot. At least some of the plurality of markings at different positions along the axial direction are distinguishable from each other by a characteristic feature set depending on the at least one material characteristic. The semiconductor ingot is then sliced into semiconductor wafers.
    Type: Application
    Filed: October 8, 2015
    Publication date: April 13, 2017
    Inventors: Johannes Freund, Helmut Oefner, Hans-Joachim Schulze
  • Publication number: 20170062568
    Abstract: A semiconductor device is provided that includes a silicon semiconductor body having a drift or base zone of net n-type doping. An n-type doping is partially compensated by 10% to 80% with p-type dopants. A net n-type doping concentration in the drift or base zone is in a range from 1×1013 cm?3 to 1×1015 cm?3. A portion of 5% to 75% of the n-type doping is made up of hydrogen related donors.
    Type: Application
    Filed: August 25, 2016
    Publication date: March 2, 2017
    Applicant: Infineon Technologies AG
    Inventors: Nico CASPARY, Helmut OEFNER, Hans-Joachim SCHULZE
  • Patent number: 9559020
    Abstract: A method for treating a semiconductor wafer having a basic doping is disclosed. The method includes determining a doping concentration of the basic doping, and adapting the basic doping of the semiconductor wafer by postdoping. The postdoping includes at least one of the following methods: a proton implantation and a subsequent thermal process for producing hydrogen induced donors. In this case, at least one of the following parameters is dependent on the determined doping concentration of the basic doping: an implantation dose of the proton implantation, and a temperature of the thermal process.
    Type: Grant
    Filed: December 9, 2015
    Date of Patent: January 31, 2017
    Assignee: Infineon Technologies AG
    Inventors: Reinhard Ploss, Helmut Oefner, Hans-Joachim Schulze