Abstract: An optical modulator comprises, as optical modulator components, first and second transmitter chains and a first optical time division multiplex, OTDM, generator arranged to receive time interleaved optical pulses generated by one of said optical modulator components.

Abstract: An optical modulator comprises, as optical modulator components, first and second transmitter chains and a first optical time division multiplex, OTDM, generator arranged to receive time interleaved optical pulses generated by one of said optical modulator components.

Abstract: A matrix chip having N inputs, M outputs and a number of crosspoint switches, preferably N×M crosspoint switches. The crosspoint switches form a switching matrix that connects the inputs and outputs so that any input is randomly connectable to any output. In order to minimize the signal path lengths on the chip, the inputs and outputs are arranged on the matrix chip in the shape of a cross dividing the matrix into four sectors.

Abstract: A digital signal receiver for a high-bitrate digital signal has a serial signal input (20, 20?) and a number of N parallel digital signal outputs (26) with N>1. The receiver contains at least N+1 digital sampling channels (31-35), a Q-monitor (37, 38) for comparing the output signal of at least two of the sampling channels (31-35), and a switch fabric (36) for controllably connecting N of the sampling channels (31-35) to the outputs (26) and at least two of the sampling channels (31-35) to the Q-monitor (37, 38). This allows to use N of the sampling channels to provide the N output signals while at the same time, the at least one remaining sampling channel can be used by the Q-monitor to scan an eye diagram.

Abstract: An integrated transceiver contains a optical equalizer for a distorted O/E-converted signal, an adaptive regenerator coupled to the equalizer, and a clock recovery circuit coupled to the adaptive regenerator. The transceiver has further an embedded processing unit and an integrated programmable memory which stores software program. The processing unit is coupled to adjust threshold values of the adaptive regenerator according to a software algorithm loaded into the memory.

Abstract: A circuit for driving a semiconductor laser, in particular a vertical cavity surface-emitting laser that comprises a differential amplifier for driving the semiconductor laser directly. The semiconductor laser is differentially driven by means of the differential amplifier, a first output of the differential amplifier being direct-current-coupled to a first terminal of the semiconductor laser and a second output of the differential amplifier being alternating-current-coupled to a second terminal of the semiconductor laser.

Abstract: A digital signal receiver for a high-bitrate digital signal has a serial signal input (20, 20?) and a number of N parallel digital signal outputs (26) with N>1. The receiver contains at least N+1 digital sampling channels (31-35), a Q-monitor (37, 38) for comparing the output signal of at least two of said sampling channels (31-35), and a switch fabric (36) for controllably connecting N of said sampling channels (31-35) to said output leads (36) and at least two of said sampling channels (31-35) to said Q-monitor (37, 38). This allows to use N of the sampling channels to provide the N output signals while at the same time, the at least one remaining sampling channel can be used by the Q-monitor to scan an eye diagram.

Abstract: An electrical signal regenerator including an equalizer and a clock data recovery circuit is provided. The clock data recovery circuit is selected when an input signal of a higher bitrate multiplex level is detected, but the clock data recovery circuit is bypassed when an input signal of a lower bitrate multiplex signal is detected. The electrical signal regenerator can be used in an optical switch processing signals of the new OTN according to ITU-T G.709, in which optical signals undergo optical to electrical conversion and are fed to an electrical space switching matrix including a plurality of the switch modules electrically interconnected by means of internal electrical signal paths such as a backplane or electrical cables. The electrical signal regenerator can be coupled to each input of a switching module to check internal cabling of the switching matrix.

Abstract: A basic switching circuit combines CMOS and bipolar technique on SiGe basis and operates at a low operating voltage of only slightly more than 2V. To achieve this low operating voltage, switching operation of the circuit is effected by switching a constant current source of the switching circuit on or off using MOS transistors. In addition, the constant current source is implemented using a MOS transistor rather than a bipolar transistor, which basically acts as a controllable resistor. Moreover, the logic levels in the output signal are accurately controlled using a constant current source that is controlled by an operational amplifier and a resistor voltage divider at the output to pull the voltage level down by an amount that corresponds to the logical levels.

Abstract: A digital to analog converter is implemented by two or more digital to analog converters and is further implemented in such a way that the operation of its analog output voltages is combined and that its digital input voltages are processed in such a way that, in the case of a continuous incrementing or decrementing of the input values, the individual input values of the two or more digital to analog converters are incremented or decremented in turn. The invention furthermore relates to a phase control circuit in which the digital to analog converter can be used, and also a recognition circuit for recognizing the locking-in of a phase control circuit and a transmission unit in which such assemblies are used.

Abstract: A circuit for driving a semiconductor laser, in particular a vertical cavity surface-emitting laser that comprises a differential amplifier for driving the semiconductor laser directly. The semiconductor laser is differentially driven by means of the differential amplifier, a first output of the differential amplifier being direct-current-coupled to a first terminal of the semiconductor laser and a second output of the differential amplifier being alternating-current-coupled to a second terminal of the semiconductor laser.

Abstract: The invention relates to a digital to analog converter that is implemented by two or more digital to analog converters and that is further implemented in such a way that the operation of its analog output voltages is combined and that its digital input voltages are processed in such a way that, in the case of a continuous incrementing or decrementing of said input values, the individual input values of the two or more digital to analog converters are incremented or decremented in turn. The invention furthermore relates to a phase control circuit in which the digital to analog converter can be used, and also a recognition circuit for recognizing the locking-in of a phase control circuit and a transmission unit in which such assemblies are used.

Abstract: A basic switching circuit combines CMOS and bipolar technique on SiGe basis and operates at a low operating voltage of only slightly more than 2V. To achieve this low operating voltage, switching operation of the circuit is effected by switching a constant current source of the switching circuit on or off using MOS transistors. In addition, the constant current source is implemented using a MOS transistor rather than a bipolar transistor, which basically acts as a controllable resistor. Moreover, the logic levels in the output signal are accurately controlled using a constant current source that is controlled by an operational amplifier and a resistor voltage divider at the output to pull the voltage level down by an amount that corresponds to the logical levels.

Abstract: A matrix chip has a N inputs, M outputs, and a number of crosspoint switches, preferably N×M crosspoint switches. The crosspoint switches form a switching matrix, which is preferably a square matrix and which connects the inputs and outputs in a manner that any input is randomly connectable to any output. In order to minimize the signal path lengths on the chip, the inputs and outputs are arranged on the matrix chip in the shape of a cross dividing said matrix into four sectors, preferably into quadrants.

Abstract: An electrical signal regenerator contains an equalizer and a clock data recovery circuit, whereby the latter is selected when an input signal of a higher bitrate multiplex level is detected and bypassed when an input signal of a lower bitrate multiplex signal is detected. This regenerator can advantageously be used in a bitrate-transparent asynchronous switch for signals of the new OTN according to ITU-T G.709. In particular, received optical signals undergo O/E conversion and are fed to an asynchronous space switching matrix operable to randomly switch signals from any to any port of the crossconnect. The switching matrix contains a number of switch modules electrically interconnected by means of internal electrical signal paths such as a backplane or electrical cables. An electrical signal regenerator is coupled to each input of a switching module.

Abstract: An integrated transceiver contains a optical equalizer for a distorted O/E-converted signal, an adaptive regenerator coupled to the equalizer, and a clock recovery circuit coupled to the adaptive regenerator. The transceiver has further an embedded processing unit and an integrated programmable memory which stores software program. The processing unit is coupled to adjust threshold values of the adaptive regenerator according to a software algorithm loaded into the memory.

Abstract: When high frequency signals are transmitted to an integrated circuit through a lfine, the line must have a matched terminal resistance located as closely as possible to its end. Every portion of the line without a matched terminal resistance, and each branch of the line, produces disturbing signal reflections. In modern housings of large-scale integrated circuits the terminals are only separated by 0.5 mm, and it becomes increasingly more difficult to connect a resistance as closely as possible to the terminal of the integrated circuit. According to the invention, a field effect transistor (T.sub.R), which functions as a terminal resistance, is located inside the integrated circuit. The value determined by the channel resistance is adjusted by means of a regulated control voltage, so that the effects of operating temperature, changes in the supply voltage and deviations in the integrated circuit caused by manufacturing processes have no effect on the resistance value needed for the line match.

Abstract: For regeneration and synchronization of a high-bit-rate digital signal, a series circuit of a controllable delay line and a decision logic is traversed by the digital signal. The decision logic contains a sampling circuit, by means of which the digital signal is sampled in the middle of its eye opening.