Abstract: A stacked module device and corresponding module and method are provided where at least some modules have input ports connected to receive first resource related signals and output ports connected to provide second resource related signals. The first and second signals are different, and each module comprises a resource signal transformation unit for generating the second signal from the first signals. The resource signal transformation units of each module are of the same construction. Resources may be addresses. Further, a software configurable address assignment is provided.

Abstract: A chip carrier for flip chip applications, according to the present invention, provides peripheral bumps and inner bumps. The inputs and outputs related to the inner bumps are routed out on an additional wiring layer by means of vias. The proposed bond layout provides a high I/O count for a predefined chip size and a predefined carrier technology.

Abstract: A stacked module device and corresponding module and method are provided where at least some of the modules have access to resources. At least one of the at least some modules have assigned at least one of the resources and comprises assignment means which is adapted to assign at least one other resource to at least one other module. Further, a stacked bus system may be provided where each module has input and output terminals and an assignment unit to assign at least one other resource to at least one other module. The assignment unit supplies an output signal relating to the other resource to an output terminal corresponding in position to the input terminal receiving the input signal relating to the one resource.

Abstract: A stacked module device and corresponding module and method are provided where at least some modules have input ports connected to receive first resource related signals and output ports connected to provide second resource related signals. The first and second signals are different, and each module comprises a resource signal transformation unit for generating the second signal from the first signals. The resource signal transformation units of each module are of the same construction. Resources may be addresses. Further, a software configurable address assignment is provided.

Abstract: A chip carrier for flip chip applications, according to the present invention, provides peripheral bumps and inner bumps. The inputs and outputs related to the inner bumps are routed out on an additional wiring layer by means of vias. The proposed bond layout provides a high I/O count for a predefined chip size and a predefined carrier technology.