Patents by Inventor Hem Takiar

Hem Takiar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Die package with asymmetric leadframe connection
    Patent number: 8097495
    Abstract: A leadframe for a semiconductor package is disclosed including electrical leads which extend from one side of the leadframe to an opposite side of the leadframe, where electrical connection may be made with the semiconductor die at the second side of the leadframe. The semiconductor die may be supported on the leads extending across the leadframe. The package may further include a spacer layer affixed to the electrical leads to fortify the semiconductor package and to prevent exposure of the electrical leads during the molding of the package.
    Type: Grant
    Filed: April 1, 2008
    Date of Patent: January 17, 2012
    Assignee: SanDisk Technologies Inc.
    Inventors: Ming Hsun Lee, Chih-Chin Liao, Cheemen Yu, Hem Takiar
  • SYSTEM-IN-A-PACKAGE BASED FLASH MEMORY CARD
    Publication number: 20120009732
    Abstract: A system-in-a-package based flash memory card including an integrated circuit package occupying a small overall area within the card and cut to conform to the shape of a lid for the card. An integrated circuit may be cut from a panel into a shape that fits within and conforms to the shape of lids for a finished memory card, such as for example an SD Card. The integrated circuit package may be a system-in-a-package, a multi-chip module, or other arrangement where a complete electronic system is formed in a single package.
    Type: Application
    Filed: September 19, 2011
    Publication date: January 12, 2012
    Inventors: Hem Takiar, Robert C. Miller, Warren Middlekauff, Michael W. Patterson, Shrikar Bhagath
  • SYSTEM-IN-A-PACKAGE BASED FLASH MEMORY CARD
    Publication number: 20120007226
    Abstract: A system-in-a-package based flash memory card including an integrated circuit package occupying a small overall area within the card and cut to conform to the shape of a lid for the card. An integrated circuit may be cut from a panel into a shape that fits within and conforms to the shape of lids for a finished memory card, such as for example an SD Card. The integrated circuit package may be a system-in-a-package, a multi-chip module, or other arrangement where a complete electronic system is formed in a single package.
    Type: Application
    Filed: September 19, 2011
    Publication date: January 12, 2012
    Inventors: Hem Takiar, Robert C. Miller, Warren Middlekauff, Michael W. Patterson, Shrikar Bhagath
  • ETCHED SURFACE MOUNT ISLANDS IN A LEADFRAME PACKAGE
    Publication number: 20110309485
    Abstract: A method of fabricating a leadframe-based semiconductor package, and a semiconductor package formed thereby, are disclosed. The semiconductor package includes a leadframe and one or more semiconductor die affixed to a die paddle of the leadframe. The leadframe is formed with a plurality of electrical terminals that get surface mounted to a host PCB. The leadframe further includes one or more extended leads, at least one of which includes an electrically conductive island which gets surface mounted to the host PCB with the electrical terminals. The islands effectively increase the number terminals within the package without adding footprint to the package.
    Type: Application
    Filed: August 29, 2011
    Publication date: December 22, 2011
    Inventors: Suresh Upadhyayula, Bonnie Ming-Yan Chan, Shih-Ping Fan-chiang, Hem Takiar
  • Method of fabricating a two-sided die in a four-sided leadframe based package
    Patent number: 8058099
    Abstract: A method of fabricating a leadframe-based semiconductor package, and a semiconductor package formed thereby, are disclosed. In embodiments, a semiconductor die having die bond pads along two adjacent edges may be electrically coupled to four sides of a four-sided leadframe. Embodiments relate to lead and no-lead type leadframe.
    Type: Grant
    Filed: June 28, 2007
    Date of Patent: November 15, 2011
    Assignee: SanDisk Technologies Inc.
    Inventors: Cheemen Yu, Vani Verma, Hem Takiar
  • Stacked, interconnected semiconductor package
    Patent number: 8053880
    Abstract: An electronic component is disclosed including a plurality of stacked semiconductor packages. A first such embodiment includes an internal connector for electrically coupling the stacked semiconductor packages. A second such embodiment includes an external connector for electrically coupling the stacked semiconductor packages.
    Type: Grant
    Filed: June 22, 2009
    Date of Patent: November 8, 2011
    Assignee: SanDisk Technologies, Inc.
    Inventors: Cheeman Yu, Chih-Chin Liao, Hem Takiar
  • Method of stacking and interconnecting semiconductor packages via electrical connectors extending between adjoining semiconductor packages
    Patent number: 8053276
    Abstract: An electronic component is disclosed including a plurality of stacked semiconductor packages. A first such embodiment includes an internal connector for electrically coupling the stacked semiconductor packages. A second such embodiment includes an external connector for electrically coupling the stacked semiconductor packages.
    Type: Grant
    Filed: November 9, 2009
    Date of Patent: November 8, 2011
    Assignee: SanDisk Technologies, Inc.
    Inventors: Cheeman Yu, Chi-Chin Liao, Hem Takiar
  • System-in-a-package based flash memory card
    Patent number: 8022519
    Abstract: A system-in-a-package based flash memory card including an integrated circuit package occupying a small overall area within the card and cut to conform to the shape of a lid for the card. An integrated circuit may be cut from a panel into a shape that fits within and conforms to the shape of lids for a finished memory card, such as for example an SD Card. The integrated circuit package may be a system-in-a-package, a multi-chip module, or other arrangement where a complete electronic system is formed in a single package.
    Type: Grant
    Filed: May 19, 2005
    Date of Patent: September 20, 2011
    Assignee: SanDisk Technologies Inc.
    Inventors: Hem Takiar, Robert C. Miller, Warren Middlekauff, Michael W. Patterson, Shrikar Bhagath
  • Method of assembling semiconductor devices with LEDS
    Patent number: 8022417
    Abstract: Methods of forming integrated circuit packages having an LED molded into the package, and the integrated circuit package formed thereby. An integrated circuit including one or more semiconductor die, passive components and an LED may be assembled on a panel. The one or more semiconductor die, passive components and LED may all then be encapsulated in a molding compound, and the integrated circuits then singularized to form individual integrated circuit packages. The integrated circuits are cut from the panel so that a portion of the lens of the LED is severed during the singularization process, and an end of the lens remaining within the package lies flush with an edge of the package to emit light outside of the package.
    Type: Grant
    Filed: October 11, 2010
    Date of Patent: September 20, 2011
    Assignee: SanDisk Technologies Inc.
    Inventors: Hem Takiar, Suresh Upadhyayula
  • SEMICONDUCTOR DIE HAVING A REDISTRIBUTION LAYER
    Publication number: 20110210446
    Abstract: A semiconductor device having a redistribution layer, and methods of forming same, are disclosed. After fabrication of semiconductor die on a wafer, a tape assembly is applied onto a surface of the wafer, in contact with the surfaces of each semiconductor die on the wafer. The tape assembly includes a backgrind tape as a base layer, and a film assembly adhered to the backgrind tape. The film assembly in turn includes an adhesive film on which is deposited a thin layer of conductive material. The redistribution layer pattern is traced into the tape assembly, using for example a laser. Thereafter, the unheated portions of the tape assembly may be removed, leaving the heated redistribution layer pattern on each semiconductor die.
    Type: Application
    Filed: May 9, 2011
    Publication date: September 1, 2011
    Inventors: Chien-Ko Liao, Chin-Tien Chiu, Jack Chang Chien, Cheemen Yu, Hem Takiar
  • Etched surface mount islands in a leadframe package
    Patent number: 8008132
    Abstract: A method of fabricating a leadframe-based semiconductor package, and a semiconductor package formed thereby, are disclosed. The semiconductor package includes a leadframe and one or more semiconductor die affixed to a die paddle of the leadframe. The leadframe is formed with a plurality of electrical terminals that get surface mounted to a host PCB. The leadframe further includes one or more extended leads, at least one of which includes an electrically conductive island which gets surface mounted to the host PCB with the electrical terminals. The islands effectively increase the number terminals within the package without adding footprint to the package.
    Type: Grant
    Filed: December 28, 2007
    Date of Patent: August 30, 2011
    Assignee: SanDisk Technologies Inc.
    Inventors: Suresh Upadhyayula, Bonnie Ming-Yan Chan, Shih-Ping Fan-chiang, Hem Takiar
  • Method of reducing memory card edge roughness by edge coating
    Patent number: 7994647
    Abstract: A method of forming a semiconductor package with smooth edges, and a semiconductor package formed thereby is disclosed. In embodiments, after encapsulation, the semiconductor packages may be at least partially singulated from the panel by making one or more cuts through the panel to define one or more edges of the semiconductor package. The one or more edges may be smoothed by applying a laminate to the edges. The edges receiving the laminate may include any edge between a top and bottom surface of the package.
    Type: Grant
    Filed: October 11, 2010
    Date of Patent: August 9, 2011
    Assignee: SanDisk Technologies Inc.
    Inventors: Ong King Hoo, Java Zhu, Ning Ye, Hem Takiar
  • Padless substrate for surface mounted components
    Patent number: 7967184
    Abstract: A semiconductor package having a low profile is disclosed. In embodiments, a surface mounted component may be mounted directly to the core of the semiconductor package substrate, so that there is no conductive layer, plating layers or solder paste between the component and the substrate core. The surface mounted component may be any type of component which may be surface mounted on a substrate according to an SMT process, including for example passive components and various packaged semiconductors.
    Type: Grant
    Filed: November 16, 2005
    Date of Patent: June 28, 2011
    Assignee: SanDisk Corporation
    Inventors: Chih-Chin Liao, Ken Jian Ming Wang, Han-Shiao Chen, Chin-Tien Chiu, Jack Chang Chien, Shrikar Bhagath, Cheemen Yu, Hem Takiar
  • Semiconductor package having through holes for molding back side of package
    Patent number: 7952179
    Abstract: A portable memory card and methods of manufacturing same are disclosed. The portable memory includes a substrate having a plurality of holes formed therein. During the encapsulation process, mold compound flows over the top surface of the substrate, through the holes, and down into a recessed section formed in the bottom mold cap plate to form a projection of mold compound on the bottom surface of the substrate.
    Type: Grant
    Filed: June 28, 2007
    Date of Patent: May 31, 2011
    Assignee: SanDisk Corporation
    Inventors: Chin-Tien Chiu, Hem Takiar, Chih-Chin Liao, Cheemen Yu, Ning Ye, Jack Chang Chien
  • Semiconductor die having a redistribution layer
    Patent number: 7939944
    Abstract: A semiconductor device having a redistribution layer, and methods of forming same, are disclosed. After fabrication of semiconductor die on a wafer, a tape assembly is applied onto a surface of the wafer, in contact with the surfaces of each semiconductor die on the wafer. The tape assembly includes a backgrind tape as a base layer, and a film assembly adhered to the backgrind tape. The film assembly in turn includes an adhesive film on which is deposited a thin layer of conductive material. The redistribution layer pattern is traced into the tape assembly, using for example a laser. Thereafter, the unheated portions of the tape assembly may be removed, leaving the heated redistribution layer pattern on each semiconductor die.
    Type: Grant
    Filed: July 26, 2010
    Date of Patent: May 10, 2011
    Assignee: SanDisk Corporation
    Inventors: Chien-Ko Liao, Chin-Tien Chiu, Jack Chang Chien, Cheeman Yu, Hem Takiar
  • Method of fabricating a semiconductor package having through holes for molding back side of package
    Patent number: 7939382
    Abstract: A portable memory card and methods of manufacturing same are disclosed. The portable memory includes a substrate having a plurality of holes formed therein. During the encapsulation process, mold compound flows over the top surface of the substrate, through the holes, and down into a recessed section formed in the bottom mold cap plate to form a projection of mold compound on the bottom surface of the substrate.
    Type: Grant
    Filed: June 28, 2007
    Date of Patent: May 10, 2011
    Assignee: SanDisk Corporation
    Inventors: Chin-Tien Chiu, Hem Takiar, Chih-Chin Liao, Cheemen Yu, Ning Ye, Jack Chang Chien
  • SEMICONDUCTOR PACKAGE INCLUDING FLIP CHIP CONTROLLER AT BOTTOM OF DIE STACK
    Publication number: 20110095440
    Abstract: A semiconductor package including a plurality of stacked semiconductor die, and methods of forming the semiconductor package, are disclosed. In order to ease wirebonding requirements on the controller die, the controller die may be mounted directly to the substrate in a flip chip arrangement requiring no wire bonds or footprint outside of the controller die. Thereafter, a spacer layer may be affixed to the substrate around the controller die to provide a level surface on which to mount one or more flash memory die. The spacer layer may be provided in a variety of different configurations.
    Type: Application
    Filed: January 7, 2011
    Publication date: April 28, 2011
    Inventors: Suresh Upadhyayula, Hem Takiar
  • METHOD OF ASSEMBLING SEMICONDUCTOR DEVICES WITH LEDS
    Publication number: 20110024897
    Abstract: Methods of forming integrated circuit packages having an LED molded into the package, and the integrated circuit package formed thereby. An integrated circuit including one or more semiconductor die, passive components and an LED may be assembled on a panel. The one or more semiconductor die, passive components and LED may all then be encapsulated in a molding compound, and the integrated circuits then singularized to form individual integrated circuit packages. The integrated circuits are cut from the panel so that a portion of the lens of the LED is severed during the singularization process, and an end of the lens remaining within the package lies flush with an edge of the package to emit light outside of the package.
    Type: Application
    Filed: October 11, 2010
    Publication date: February 3, 2011
    Applicant: SANDISK CORPORATION
    Inventors: Hem Takiar, Suresh Upadhyayula
  • METHOD OF REDUCING MEMORY CARD EDGE ROUGHNESS BY EDGE COATING
    Publication number: 20110024891
    Abstract: A method of forming a semiconductor package with smooth edges, and a semiconductor package formed thereby is disclosed. In embodiments, after encapsulation, the semiconductor packages may be at least partially singulated from the panel by making one or more cuts through the panel to define one or more edges of the semiconductor package. The one or more edges may be smoothed by applying a laminate to the edges. The edges receiving the laminate may include any edge between a top and bottom surface of the package.
    Type: Application
    Filed: October 11, 2010
    Publication date: February 3, 2011
    Applicant: SANDISK CORPORATION
    Inventors: Ong King Hoo, Java Zhu, Ning Ye, Hem Takiar
  • SEMICONDUCTOR DEVICE HAVING UNDER-FILLED DIE IN A DIE STACK
    Publication number: 20110024881
    Abstract: A semiconductor device including a semiconductor die in a die stack under-filled with a film. Once the semiconductor die are formed, they may be stacked and interconnected. The interconnection may leave a small space between semiconductor die in the die stack. This space is advantageously completely filled using a vapor deposition process where a coating is deposited as a vapor which flows over all surfaces of the die stack, including into the spaces between the die in the stack. The vapor then deposits on the surfaces between and around the die and forms a film which completely fills the spaces between the die in the die stack. The material used in the vapor deposition under-fill process may for example be a member of the parylene family of polymers, and in embodiments, may be parylene-N.
    Type: Application
    Filed: October 18, 2010
    Publication date: February 3, 2011
    Inventors: Shrikar Bhagath, Hem Takiar