Patents by Inventor HENG-YI LIN

HENG-YI LIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240126973
    Abstract: A method includes: identifying a first design rule check (DRC) violation in a cluster box on an integrated circuit layout; locating a first target cell at a first original location in the cluster box, the first target cell being connected to the first DRC violation; detecting a first plurality of candidate locations for the first target cell in the cluster box; calculating resource costs associated with the first plurality of candidate locations; determining a first relocation location, among the first plurality of candidate locations, associated with a minimum resource cost for the first target cell; and relocating the first target cell from the first original location to the first relocation location.
    Type: Application
    Filed: August 10, 2023
    Publication date: April 18, 2024
    Inventors: Ching Hsu, Heng-Yi Lin, Yi-Lin Chuang
  • Patent number: 11853681
    Abstract: A method includes: identifying a first design rule check (DRC) violation in a cluster box on an integrated circuit layout; locating a first target cell at a first original location in the cluster box, the first target cell being connected to the first DRC violation; detecting a first plurality of candidate locations for the first target cell in the cluster box; calculating resource costs associated with the first plurality of candidate locations; determining a first relocation location, among the first plurality of candidate locations, associated with a minimum resource cost for the first target cell; and relocating the first target cell from the first original location to the first relocation location.
    Type: Grant
    Filed: April 16, 2021
    Date of Patent: December 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ching Hsu, Heng-Yi Lin, Yi-Lin Chuang
  • Patent number: 11809301
    Abstract: Techniques are disclosed for generating an execution plan for performing functional tests in a cloud-computing environment. Infrastructure resources and capabilities (e.g., system requirements) may be defined within an infrastructure object (e.g., a resource of a declarative infrastructure provisioner) that stores a code segment that implements the resource or capability. Metadata may be maintained that indicates what particular capabilities are applicable to each infrastructure resource. Using the metadata, the system can generate an execution plan by combining code segments for each resource with code segments defining each capability in accordance with the metadata. The execution plan may include programmatic instructions that, when executed, generate a set of test results. The system can execute instructions that cause the set of test results to be presented at a user device.
    Type: Grant
    Filed: November 2, 2022
    Date of Patent: November 7, 2023
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventors: Michael Chirkin, Mohammed Yousuf Pariyani, Heng-Yi Lin
  • Patent number: 11593251
    Abstract: Techniques are disclosed for generating an execution plan for performing functional tests in a cloud-computing environment. Infrastructure resources and capabilities (e.g., system requirements) may be defined within an infrastructure object (e.g., a resource of a declarative infrastructure provisioner) that stores a code segment that implements the resource or capability. Metadata may be maintained that indicates what particular capabilities are applicable to each infrastructure resource. Using the metadata, the system can generate an execution plan by combining code segments for each resource with code segments defining each capability in accordance with the metadata. The execution plan may include programmatic instructions that, when executed, generate a set of test results. The system can execute instructions that cause the set of test results to be presented at a user device.
    Type: Grant
    Filed: March 3, 2021
    Date of Patent: February 28, 2023
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventors: Michael Chirkin, Mohammed Yousuf Pariyani, Heng-Yi Lin
  • Publication number: 20230059853
    Abstract: Techniques are disclosed for generating an execution plan for performing functional tests in a cloud-computing environment. Infrastructure resources and capabilities (e.g., system requirements) may be defined within an infrastructure object (e.g., a resource of a declarative infrastructure provisioner) that stores a code segment that implements the resource or capability. Metadata may be maintained that indicates what particular capabilities are applicable to each infrastructure resource. Using the metadata, the system can generate an execution plan by combining code segments for each resource with code segments defining each capability in accordance with the metadata. The execution plan may include programmatic instructions that, when executed, generate a set of test results. The system can execute instructions that cause the set of test results to be presented at a user device.
    Type: Application
    Filed: November 2, 2022
    Publication date: February 23, 2023
    Applicant: Oracle International Corporation
    Inventors: Michael Chirkin, Mohammed Yousuf Pariyani, Heng-Yi Lin
  • Publication number: 20220391574
    Abstract: A system and method for fixing DRC violations includes receiving a layout pattern having a design rule check (DRC) violation therein, determining that the layout pattern is an inlier based upon a comparison of the layout pattern with a plurality of previously analyzed layout patterns. The comparison may be performed by an anomaly detection algorithm. The system and method may also include selecting a recipe from a pool of recipes previously applied to the plurality of previously analyzed layout patterns for fixing the DRC violation in the layout clip upon determining that the layout pattern is an inlier.
    Type: Application
    Filed: July 28, 2022
    Publication date: December 8, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chen Huang, Heng-Yi Lin, Yi-Lin Chuang
  • Publication number: 20220366121
    Abstract: A method includes the following operations: identifying a layer of a first layout based on a first violation generated on the layer; generating a metal density value associated with the layer; when the metal density value is larger than or equal to a preset value, classifying the first violation into a first class corresponding to routing congestions of the first layout; when the first violation is classified into the first class, assigning, to the first violation, a first operation of a plurality of first pre-stored operations corresponding to the first class; and performing the first operation to the first layout to generate a second layout.
    Type: Application
    Filed: July 27, 2022
    Publication date: November 17, 2022
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., TSMC NANJING COMPANY LIMITED
    Inventors: Yi-Lin CHUANG, Song LIU, Pei-Pei CHEN, Heng-Yi LIN, Shih-Yao LIN, Chin-Hsien WANG
  • Patent number: 11481536
    Abstract: A method includes the following operations: receiving design rule violations of a first layout; classifying, according to first chip features of the first layout, a first violation of the design rule violations into a first class of predefined classes; generating a first vector array for at least one of the first chip features of the first layout, that is associated with the first violation; selecting, according to the first vector array, first operations from pre-stored operations; generating a second layout based on the first layout and the first operations.
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: October 25, 2022
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., TSMC NANJING COMPANY LIMITED
    Inventors: Yi-Lin Chuang, Song Liu, Pei-Pei Chen, Heng-Yi Lin, Shih-Yao Lin, Chin-Hsien Wang
  • Publication number: 20220335197
    Abstract: A method includes: identifying a first design rule check (DRC) violation in a cluster box on an integrated circuit layout; locating a first target cell at a first original location in the cluster box, the first target cell being connected to the first DRC violation; detecting a first plurality of candidate locations for the first target cell in the cluster box; calculating resource costs associated with the first plurality of candidate locations; determining a first relocation location, among the first plurality of candidate locations, associated with a minimum resource cost for the first target cell; and relocating the first target cell from the first original location to the first relocation location.
    Type: Application
    Filed: April 16, 2021
    Publication date: October 20, 2022
    Inventors: Ching Hsu, Heng-Yi Lin, Yi-Lin Chuang
  • Patent number: 11443097
    Abstract: A system and method for fixing DRC violations includes receiving a layout pattern having a design rule check (DRC) violation therein, determining that the layout pattern is an inlier based upon a comparison of the layout pattern with a plurality of previously analyzed layout patterns. The comparison may be performed by an anomaly detection algorithm. The system and method may also include selecting a recipe from a pool of recipes previously applied to the plurality of previously analyzed layout patterns for fixing the DRC violation in the layout clip upon determining that the layout pattern is an inlier.
    Type: Grant
    Filed: November 24, 2020
    Date of Patent: September 13, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Yu-Chen Huang, Heng-Yi Lin, Yi-Lin Chuang
  • Publication number: 20220283926
    Abstract: Techniques are disclosed for generating an execution plan for performing functional tests in a cloud-computing environment. Infrastructure resources and capabilities (e.g., system requirements) may be defined within an infrastructure object (e.g., a resource of a declarative infrastructure provisioner) that stores a code segment that implements the resource or capability. Metadata may be maintained that indicates what particular capabilities are applicable to each infrastructure resource. Using the metadata, the system can generate an execution plan by combining code segments for each resource with code segments defining each capability in accordance with the metadata. The execution plan may include programmatic instructions that, when executed, generate a set of test results. The system can execute instructions that cause the set of test results to be presented at a user device.
    Type: Application
    Filed: March 3, 2021
    Publication date: September 8, 2022
    Applicant: Oracle International Corporation
    Inventors: Michael Chirkin, Mohammed Yousuf Pariyani, Heng-Yi Lin
  • Publication number: 20220164515
    Abstract: A system and method for fixing DRC violations includes receiving a layout pattern having a design rule check (DRC) violation therein, determining that the layout pattern is an inlier based upon a comparison of the layout pattern with a plurality of previously analyzed layout patterns. The comparison may be performed by an anomaly detection algorithm. The system and method may also include selecting a recipe from a pool of recipes previously applied to the plurality of previously analyzed layout patterns for fixing the DRC violation in the layout clip upon determining that the layout pattern is an inlier.
    Type: Application
    Filed: November 24, 2020
    Publication date: May 26, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Yu-Chen Huang, Heng-Yi Lin, Yi-Lin Chuang
  • Publication number: 20220147691
    Abstract: A method includes the following operations: receiving design rule violations of a first layout; classifying, according to first chip features of the first layout, a first violation of the design rule violations into a first class of predefined classes; generating a first vector array for at least one of the first chip features of the first layout, that is associated with the first violation; selecting, according to the first vector array, first operations from pre-stored operations; generating a second layout based on the first layout and the first operations.
    Type: Application
    Filed: December 8, 2020
    Publication date: May 12, 2022
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPNAY, LTD., TSMC NANJING COMPANY LIMITED
    Inventors: Yi-Lin CHUANG, Song LIU, Pei-Pei CHEN, Heng-Yi LIN, Shih-Yao LIN, Chin-Hsien WANG
  • Publication number: 20190362169
    Abstract: A method for verifying user identity and age includes: using a front camera to receive a frontal image of a human face; using a rear camera to receive an image of an identification document, from which a headshot and a date of birth code are extracted; determining whether there is a coincidence or not by comparing the face image and the headshot; determining whether an age value, calculated by comparing the date of birth code and a current date, is greater than or equal to a threshold value; when the face image coincides the headshot and the age value is larger than or equal to the threshold value, the verification is passed and an online transaction proceeds; when the face image is not consistent with the headshot or the age value is smaller than the threshold value, the verification fails and the online transaction is terminated.
    Type: Application
    Filed: May 25, 2018
    Publication date: November 28, 2019
    Inventors: Heng-Yi LIN, Eric TANG, Hua CHENG
  • Patent number: 9204470
    Abstract: A method is for allowing a wireless target device to automatically connect to a target network. The method is to be implemented by a wireless executing device in a wireless network system. In the method, the wireless executing device is configured to establish an ad-hoc wireless network with the wireless target device, and to transmit an access setting to the wireless target device over the ad-hoc wireless network. The access setting enables the wireless target device to connect to the target network automatically.
    Type: Grant
    Filed: August 5, 2013
    Date of Patent: December 1, 2015
    Assignees: Lite-On Electronics (Guangzhou) Limited, Lite-On Technology Corp.
    Inventors: Chih-Li Pan, Heng-Yi Lin, Chih-Yen Wu
  • Publication number: 20140064198
    Abstract: A method is for allowing a wireless target device to automatically connect to a target network. The method is to be implemented by a wireless executing device in a wireless network system. In the method, the wireless executing device is configured to establish an ad-hoc wireless network with the wireless target device, and to transmit an access setting to the wireless target device over the ad-hoc wireless network. The access setting enables the wireless target device to connect to the target network automatically.
    Type: Application
    Filed: August 5, 2013
    Publication date: March 6, 2014
    Applicants: LITE-ON TECHNOLOGY CORP., LITE-ON ELECTRONICS (GUANGZHOU) LIMITED
    Inventors: CHIH-LI PAN, HENG-YI LIN, CHIH-YEN WU