Abstract: A storage device controller includes drive controller circuitry configured to control writing and fetching of data from a storage medium, read data channel circuitry for interfacing between the drive controller circuitry and the storage medium, test controller circuitry configured to test the read data channel circuitry by issuing test commands simulating the writing and fetching of data from the storage medium, and selector circuitry configured to switchably couple the read data channel circuitry to the drive controller circuitry in an operating mode and to the test controller circuitry in a testing mode. The storage device controller may include a pattern generator configured to output the test commands. Processor circuitry may be configured to store test results in memory, to compute performance metrics from the stored test results, and communicate the performance metrics to a host device.

Abstract: Embodiments of the present disclosure provide a method of self-servo writing, the method comprising actions of positionally tracking a selected timing track of a data storage disk, wherein the selected timing track has one or more timing segments; synchronizing an angular position signal to rotation of the data storage disk based on at least one of the one or more timing segments of the selected timing track; specifying servo sector positions relative to the synchronized angular position signal; writing servo sectors to the data storage disk at the specified servo sector positions relative to the synchronized angular position signal; detecting one or more positional errors in timing segments of a next timing track of the data storage disk based at least in part on the synchronized angular position signal; and accounting for the detected one or more positional errors in writing subsequent servo tracks. Other embodiments are also described.

Abstract: A storage device configured to communicate with a host according to a serial communication standard. The storage device includes a receiver configured to receive host data from the host; a clock data recovery circuit configured to determine a first frequency of host data transmitted by a host; a phase locked loop configured to generate a local phase corresponding to a local clock signal; a frequency offset calculator configured to generate a frequency offset corresponding to the first frequency and a second frequency of the local clock signal; an accumulator configured to generate a phase offset corresponding to a difference between the local phase and a phase of the host data; an interpolator configured to generate a compensated local clock signal using the phase offset and the local phase; and a transmitter configured to transmit device data to the host using the compensated local clock signal.

Abstract: Embodiments of the present disclosure provide a method of self-servo writing, the method comprising actions of positionally tracking a selected timing track of a data storage disk, wherein the selected timing track has one or more timing segments; synchronizing an angular position signal to rotation of the data storage disk based on at least one of the one or more timing segments of the selected timing track; specifying servo sector positions relative to the synchronized angular position signal; writing servo sectors to the data storage disk at the specified servo sector positions relative to the synchronized angular position signal; detecting one or more positional errors in timing segments of a next timing track of the data storage disk based at least in part on the synchronized angular position signal; and accounting for the detected one or more positional errors in writing subsequent servo tracks. Other embodiments are also described.

Abstract: A system includes a self-servo-write (SSW) module, a read module, and a write module. The SSW module writes servo spirals on a magnetic medium of a hard disk drive (HDD) via a write head of the HDD. The read module reads the servo spirals via a read head of the HDD and generates read signals. The write module writes non-servo data on the magnetic medium via the write head based on the read signals before the SSW module writes servo wedges on the magnetic medium.

Abstract: A device comprises a transmitter, a receiver and a clock generator that generates a clock signal having a local clock phase. A clock recovery circuit communicates with the receiver and recovers a host clock frequency from data received from a host by the receiver. A frequency offset circuit communicates with the clock recovery circuit and the clock generator and generates a frequency offset based on the local clock phase and the recovered host clock frequency. A frequency compensator compensates a frequency of the transmitter using the frequency offset.

Abstract: Some of the embodiments of the present disclosure provide a disk drive system comprising a disk drive system comprising a disk having a track upon a surface of the disk, the track including a first data-storing sector and a second data storing sector, and a servo sector located between the first data-storing sector and the second data-storing sector, the servo sector including a first flying height (FH) field having a predetermined pattern. Other embodiments are also described and claimed.

Abstract: Some of the embodiments of the present disclosure provide a disk drive system comprising a disk drive system comprising a disk having a track upon a surface of the disk, the track including a first data-storing sector and a second data storing sector, and a servo sector located between the first data-storing sector and the second data-storing sector, the servo sector including a first flying height (FH) field having a predetermined pattern. Other embodiments are also described and claimed.

Abstract: A decoder system comprises a tensor-product code (TPC) decoder that decodes a received data stream to generate a decoded signal. A mark module that replaces low-density parity check (LDPC) parity bits of the decoded signal with 0s to generate a reset output signal. A deinterleave module deinterleaves error correction parity bits that are within the reset output signal to generate a deinterleaved signal that comprises a decoded portion and a concatenated portion. The concatenated portion comprises the error correction parity bits. A parity decoder module removes the concatenated portion from the deinterleaved signal.

Abstract: A low-density parity check (LDPC) decoder comprises a decoded data stream generator that generates a decoded data stream based on a received data stream and a set of matrix-based codewords. The matrix-based codewords form a LDPC parity check matrix H. A decoder control module at least one of prewrites or replaces a selected portion of at least one of the plurality of codewords with zeros prior to generation of the decoded data stream.

Abstract: A system includes a self-servo-write (SSW) module, a read module, and a write module. The SSW module writes servo spirals on a magnetic medium of a hard disk drive (HDD) via a write head of the HDD. The read module reads the servo spirals via a read head of the HDD and generates read signals. The write module writes non-servo data on the magnetic medium via the write head based on the read signals before the SSW module writes servo wedges on the magnetic medium.

Abstract: A system including a read module, a clock generator module, and a write module. The read module generates read signals in response to reading servo spirals from a magnetic medium of a hard disk drive. The clock generator module generates a spiral clock based on the read signals, and generates, based on the spiral clock, (i) a first write clock and (ii) a second write clock. The spiral clock has a first frequency, the first write clock has a second frequency, and the second write clock has a third frequency. The write module is configured to (i) write a first servo wedge on a first zone of the magnetic medium of the hard disk drive based on the first write clock, and (ii) write a second servo wedge on a second zone of the magnetic medium of the hard disk drive based on the second write clock.

Abstract: A decoder memory system comprises a first memory comprising at least a portion of a parity check matrix H. A second memory receives the portion from the first memory and that is associated with a previous decoding iteration. A third memory communicates with the first memory, receives the parity check matrix H and is associated with a current decoding iteration. A fourth memory comprises likelihood ratios. A control module generates a LDPC decoded signal based on the parity check matrix H, the previous decoded iteration and the likelihood ratios.

Abstract: Some of the embodiments of the present disclosure provide a disk drive system comprising a disk drive system comprising a disk having a track upon a surface of the disk, the track including a first data-storing sector and a second data storing sector, and a servo sector located between the first data-storing sector and the second data-storing sector, the servo sector including a first flying height (FH) field having a predetermined pattern. Other embodiments are also described and claimed.

Abstract: A hard disk controller (HDC) of a hard disk drive (HDD) includes a read module, a clock generator module, and a write module. The read module reads servo spirals from a magnetic medium of the HDD via a read head of the HDD and generates read signals. The clock generator module generates a spiral clock having a first frequency based on the read signals and generates based on the spiral clock R write clocks having R frequencies, respectively, that are different than the first frequency, where R is an integer greater than 1. The write module writes via a write head of the HDD a first servo wedge on a first one of R zones of the magnetic medium using a first one of the R write clocks and a second servo wedge on a second one of the R zones using a second one of the R write clocks.

Abstract: An encoder system includes a receive module that receives a data stream. A parity generation module generates parity bits based on the data stream and a tensor-product code. A parity insertion module combines the parity bits and the data stream to generate encoded bits.

Abstract: Some of the embodiments of the present disclosure provide a disk drive system comprising a disk drive system comprising a disk having a track upon a surface of the disk, the track including a first data-storing sector and a second data storing sector, and a servo sector located between the first data-storing sector and the second data-storing sector, the servo sector including a first flying height (FH) field having a predetermined pattern. Other embodiments are also described and claimed.

Abstract: Circuits, architectures, a system and methods for clock data recovery. The circuit generally includes a clock phase adjustment circuit, receiving clock phase information and providing a clock phase adjustment signal, a clock frequency adjustment circuit, receiving clock frequency information and providing a clock frequency adjustment signal, and an adder circuit, receiving the clock phase adjustment signal and the clock frequency adjustment signal, and providing a clock recovery adjustment signal. The architectures and/or systems generally comprise those that include a clock data recovery circuit embodying one or more of the inventive concepts disclosed herein. The method generally comprises the steps of sampling the data stream at predetermined times, generating clock frequency information and clock phase information from sampled data, and altering a frequency and/or a phase of the clock signal in response to the clock frequency information and the clock phase information.

Abstract: A hard disk control system comprises a phase adjust module, an offset adjust module, and a read/write timing module. The phase adjust module generates a phase adjust signal based on a phase difference between a first repeatable run out (RRO) field and a servo wedge field. The offset adjust module outputs a position calibration pattern to a storage medium based on the phase adjust signal; receives at least a portion of the position calibration pattern from the storage medium; and determines an offset based on a comparison between the output position calibration pattern and the received portion of the position calibration pattern. The read/write timing module determines a position to write a second RRO field on the storage medium based on the offset.

Abstract: A device comprises a transmitter, a receiver and a clock generator that generates a local clock frequency. A clock recovery circuit communicates with the receiver and recovers a host clock frequency from data received from a host by the receiver. A frequency offset circuit communicates with the clock recovery circuit and the clock generator and generates a frequency offset based on the clock frequency and the recovered host clock frequency. A frequency compensator compensates a frequency of the transmitter using the frequency offset.