Abstract: A schottky diode is formed of a sintered barrier metal layer which contacts a lightly doped silicon surface. The barrier metal layer is formed of palladium as well as a small quantity of another metal whose choice is determined by the desired value of the barrier height of the resulting schottky diode. A small quantity of platinum is selected to increase the barrier height, and a small quantity of nickel is selected to decrease the barrier height. A contact metal, which may include a tri-metal layer of titanium, nickel and silver, is formed atop the sintered schottky barrier layer. The resulting process also allows for control of reverse hot leakage current.

Abstract: A cellular insulated gate bipolar transistor ("IGBT") device has a reduced length of the channels of the individual cells that is formed by reducing the channel drive in time from the customary 120 minutes at 1175.degree. C. to between 60 and 90 minutes at 1175.degree. C. The process also permits the use of a higher minority carrier lifetime killing electron radiation dose to improve switching power loss while reducing SOA by only a small value. Alternatively, the increased concentration region located in the active region between spaced bases is initially driven in at a temperature of about 1175.degree. C. for about 12 hours, rather than the customary 8 hours, and the channel drive in time is reduced from 120 minutes to 60 minutes. The shorter channel length, when combined with the deeper enhancement region, allows for higher lifetime electron irradiation doses or heavy metal diffusion temperatures.

Abstract: A cellular insulated gate bipolar transistor ("IGBT") device employs increased concentration in the active region between spaced bases to a depth greater than the depth of the base regions. The implant dose which is the source of the increased concentration is about 3.5.times.10.sup.12 atoms per centimeter squared and is driven for about 10 hours at 1175.degree. C. Lifetime is reduced by an increased radiation dose to reduce switching loss without reducing breakdown voltage or increasing forward voltage drop above previous levels. The increased concentration region permits a reduction in the spacing between bases and provides a region of low localized bipolar gain, increasing the device latch current. The avalanche energy which the device can successfully absorb while turning off an inductive load is significantly increased. The very deep increased conduction region is formed before the body and source regions in a novel process for making the new junction pattern.

Abstract: A schottky diode is formed of a sintered palladium platinum silicide in contact with a lightly doped silicon surface in which the platinum and palladium are present in a ratio of about one part to about 10 parts respectively, by weight.

Abstract: A cellular insulated gate bipolar transistor ("IGBT") device employs increased concentration in the active region between spaced bases to a depth greater than the depth of the base regions. The implant dose which is the source of the increased concentration is about 3.5.times.10.sup.12 atoms per centimeter squared and is driven for about 10 hours at 1175.degree. C. Lifetime is reduced by an increased radiation dose to reduce switching loss without reducing breakdown voltage or increasing forward voltage drop above previous levels. The increased concentration region permits a reduction in the spacing between bases and provides a region of low localized bipolar gain, increasing the device latch current. The avalanche energy which the device can successfully absorb while turning off an inductive load is significantly increased. The very deep increased conduction region is formed before the body and source regions in a novel process for making the new junction pattern.

Abstract: The back contact of a silicon die consists of a pure aluminum contact, alloyed into the back surface of the silicon. The back surface need not be subjected to a grinding operation. The aluminum is deposited by an E-beam deposition process. The aluminum is alloyed into the silicon at a temperature lower than the melting point of pure aluminum, but higher than the melting point of a silicon-aluminum eutectic. Aluminum, nickel and silver are thereafter E-beam deposited, in sequence, on the aluminum surface and are sintered.

Abstract: A semiconductor device having an MOS-type gate and a main power conduction path through the thickness of the chip has a first main contact on the front surface of the device and a second main contact on the back surface of the device. The contact on the front surface overlies junctions defining the MOSGATE structure and has a solderable electrode. The solderable electrode is enclosed by a dam of amorphous silicon. Solder will not wet amorphous silicon so that the solder is contained within the periphery-defined by the amorphous silicon. The solderable electrode permits heat to be withdrawn from the front surface of the chip and equalizes the current density over all areas underlying the front main contact to prevent hot spots. The solderable contact reduces damage to the cells underlying the front contact as could occur during compression bonding of a lead to a conventional non-solderable aluminum contact.

Abstract: A metallizing system for silicon surfaces consists of sequential layers of nickel, chromium, nickel and silver. Approximately 2 microns of the silicon surface are removed prior to metallization to ensure removal of an oxygen-saturated layer of silicon before the first nickel layer is deposited. The assembly is heated sufficiently that the first nickel layer forms a nickel-silicide layer at the silicon surface. The metallizing adheres to bare treated silicon but does not adhere to adjacent oxide coatings and easily lifts off of oxide-coated surfaces. The metallizing is solderable, makes ohmic contact to the silicon, regardless of its conductivity type and survives subsequent alloy processing temperatures.

Abstract: Platinum atoms are uniformly dispersed throughout a silicon wafer containing preformed junctions by depositing a layer of platinum on a clean silicon surface and thereafter immediately heating the wafer to about 500.degree. C. to form platinum silicide. Alternatively, a layer of palladium may be deposited on the surface of the wafer, a layer of platinum is deposited atop the palladium and the wafer is heated to form a palladium silicide with platinum atoms uniformly dispersed throughout the silicide layer. The wafer is heated to about 900.degree. C. for a short time which is sufficiently high to cause the platinum atoms to diffuse into the silicon wafer but is too low and lasts for too short a time to cause the movement of the preformed junctions within the wafer.

Abstract: A schottky diode with a molybdenum schottky barrier layer has its perimeter encircled by a guard ring. The outer periphery of the guard ring is covered by a passivating oxide layer. The periphery of the molybdenum electrode in one embodiment of the invention has a peripheral edge which extends to but is spaced from the facing periphery of the oxide passivating coating. A layer of titanium metal which adheres to oxide better than does molybdenum, overlies the molybdenum layer and contacts the surface exposed by the gap between the molybdenum and the oxide and overlies and adheres to the oxide layer. Nickel and silver layers are then formed atop the titanium metal layer. Alternatively, the underlying molybdenum layer can extend to and over a portion of the oxide layer. The titanium layer extends over the molybdenum layer and contacts the outer periphery of the oxide to encapsulate the molybdenum and hold it atop the oxide.

Abstract: A schottky diode and process of manufacture therefor is disclosed wherein a schottky junction is formed between a high work function metal, typically molybdenum, and a single crystal intermetallic alloy of either palladium or platinum with silicon. The intermetallic alloy is formed by sintering palladium or platinum with silicon at the surface of an epitaxial silicon layer, and then removing, by etching, all of the silicide which is formed. The intermetallic layer remains after the etching process. When using platinum as the metal to form to silicide, the platinum is sheathed with molybdenum before sintering. A titanium layer is placed between the surface of the high work function metal and the outer conductive layers used to permit soldering of the finished wafer or chip in place to avoid degradation of the junction during solder-down.

Abstract: A schottky diode and process of manufacture therefor is disclosed wherein a schottky junction is formed between a tungsten schottky barrier metal and a silicon surface which has been treated to produce a single crystal surface by sintering thereto platinum which is encapsulated on its upper and lower surface with palladium layers. After the sintering operation, all traces of silicide are removed by etching and a tungsten or molybdenum schottky barrier layer is applied to the silicide-treated layer. The resultant schottky junction is capable of good operation at extremely high temperatures, for example 200.degree. C. and can be produced with high yield.

Abstract: A schottky diode and process of manufacture therefor is disclosed wherein a schottky junction is formed between a high work function metal, typically molybdenum, and a single crystal intermetallic alloy of either palladium or platinum with silicon. The intermetallic alloy is formed by sintering palladium or platinum with silicon at the surface of an epitaxial silicon layer, and then removing, by etching, all of the silicide which is formed. The intermetallic layer remains after the etching process. When using platinum as the metal to form to silicide, the platinum is sheathed with molybdenum before sintering. A titanium layer is placed between the surface of the high work function metal and the outer conductive layers used to permit soldering of the finished wafer or chip in place to avoid degradation of the junction during solder-down.