Abstract: In one embodiment a method is provided for maintaining a substrate processing surface. The method generally includes performing a set of measurements on the substrate processing surface, wherein the set of measurements are taken using a displacement sensor coupled to a processing surface conditioning arm, determining a processing surface profile based on the set of measurements, comparing the processing surface profile to a minimum profile threshold, and communicating a result of the profile comparison.

Abstract: A method for forming a polishing media and an article of manufacture is described. The article of manufacture may be formed into a polishing article. The polishing article includes a polymer base material and a plurality of nano-scale structures disposed in or on the polymer base material.

Abstract: Embodiments in accordance with the present invention relate to multi-stage curing processes for chemical vapor deposited low K materials. In certain embodiments, a combination of electron beam irradiation and thermal exposure steps may be employed to control selective outgassing of porogens incorporated into the film, resulting in the formation of nanopores. In accordance with one specific embodiment, a low K layer resulting from reaction between a silicon-containing component and a non-silicon containing component featuring labile groups, may be cured by the initial application of thermal energy, followed by the application of radiation in the form of an electron beam.

Abstract: A method of forming a layer on a substrate in a chamber, wherein the substrate has at least one formed feature across its surface, is provided. The method includes exposing the substrate to a silicon-containing precursor in the presence of a plasma to deposit a layer, treating the deposited layer with a plasma, and repeating the exposing and treating until a desired thickness of the layer is obtained. The plasma may be generated from an oxygen-containing gas.

Abstract: An apparatus and method are provided for controlling the intensity and distribution of a plasma discharge in a plasma chamber. In one embodiment, a shaped electrode is embedded in a substrate support to provide an electric field with radial and axial components inside the chamber. In another embodiment, the face plate electrode of the showerhead assembly is divided into zones by isolators, enabling different voltages to be applied to the different zones. Additionally, one or more electrodes may be embedded in the chamber side walls.

Abstract: Apparatus and methods for distributing gases into a processing chamber are disclosed. In one embodiment, the apparatus includes a gas distribution plate having a plurality of apertures disposed therethrough and a blocker plate having both a plurality of apertures disposed therethrough and a plurality of feed through passageways disposed therein. A first gas pathway delivers a first gas through the plurality of apertures in the blocker plate and the gas distribution plate. A bypass gas pathway delivers a second gas through the plurality of feed through passageways in the blocker plate and to areas around the blocker plate prior to the second gas passing through the gas distribution plate.

Abstract: A process flow integration scheme employs one or more techniques to control stress in a semiconductor device formed thereby. In accordance with one embodiment, cumulative stress contributed by RTP of a nitride spacer and polysilicon gate, and subsequent deposition of a high stress etch stop layer, enhance strain and improve device performance. Germanium may be deposited or implanted into the gate structure in order to facilitate stress control.

Abstract: An ultraviolet (UV) cure chamber enables curing a dielectric material disposed on a substrate and in situ cleaning thereof. A tandem process chamber provides two separate and adjacent process regions defined by a body covered with a lid having windows aligned respectively above each process region. One or more UV sources per process region that are covered by housings coupled to the lid emit UV light directed through the windows onto substrates located within the process regions. The UV sources can be an array of light emitting diodes or bulbs utilizing a source such as microwave or radio frequency. The UV light can be pulsed during a cure process. Using oxygen radical/ozone generated remotely and/or in-situ accomplishes cleaning of the chamber. Use of lamp arrays, relative motion of the substrate and lamp head, and real-time modification of lamp reflector shape and/or position can enhance uniformity of substrate illumination.

Abstract: Methods for forming silicon nitride hard masks are provided. The silicon nitride hard masks include carbon-doped silicon nitride layers and undoped silicon nitride layers. Carbon-doped silicon nitride layers that are deposited from a mixture comprising a carbon source compound, a silicon source compound, and a nitrogen source in the presence of RF power are provided. Also provided are methods of UV post-treating silicon nitride layers to provide silicon nitride hard masks. The carbon-doped silicon nitride layers and UV post-treated silicon nitride layers have desirable wet etch rates and dry etch rates for hard mask layers.

Abstract: A method for forming a structure includes forming at least one feature across a surface of a substrate. A nitrogen-containing dielectric layer is formed over the at least one feature. A first portion of the nitrogen-containing layer on at least one sidewall of the at least one feature is removed at a first rate and a second portion of the nitrogen-containing layer over the substrate adjacent to a bottom region of the at least one feature is removed at a second rate. The first rate is greater than the second rate. A dielectric layer is formed over the nitrogen-containing dielectric layer.

Abstract: The present invention generally provides a method for forming a dielectric barrier with lowered dielectric constant, improved etching resistivity and good barrier property. One embodiment provides a method for processing a semiconductor substrate comprising flowing a precursor to a processing chamber, wherein the precursor comprises silicon-carbon bonds and carbon-carbon bonds, and generating a low density plasma of the precursor in the processing chamber to form a dielectric barrier film having carbon-carbon bonds on the semiconductor substrate, wherein the at least a portion of carbon-carbon bonds in the precursor is preserved in the low density plasma and incorporated in the dielectric barrier film.

Abstract: The present invention generally provides a method for forming multilevel interconnect structures, including multilevel interconnect structures that include an air gap. One embodiment provides a method for forming conductive lines in a semiconductor structure comprising forming trenches in a first dielectric layer, wherein air gaps are to be formed in the first dielectric layer, depositing a conformal dielectric barrier film in the trenches, wherein the conformal dielectric barrier film comprises a low k dielectric material configured to serve as a barrier against a wet etching chemistry used in forming the air gaps in the first dielectric layer, depositing a metallic diffusion barrier film over the conformal low k dielectric layer, and depositing a conductive material to fill the trenches.

Abstract: Methods for high temperature deposition an amorphous carbon film with improved step coverage are provided. In one embodiment, a method for of depositing an amorphous carbon film includes providing a substrate in a process chamber, heating the substrate at a temperature greater than 500 degrees Celsius, supplying a gas mixture comprising a hydrocarbon compound and an inert gas into the process chamber containing the heated substrate, and depositing an amorphous carbon film on the heated substrate having a stress of between 100 mega-pascal (MPa) tensile and about 100 mega-pascal (MPa) compressive.

Abstract: Methods of making an article having a protective coating for use in semiconductor applications are provided. In certain embodiments, a method of coating an aluminum surface of an article utilized in a semiconductor processing chamber is provided. The method comprises providing a processing chamber; placing the article into the processing chamber; flowing a first gas comprising a carbon source into the processing chamber; flowing a second gas comprising a nitrogen source into the processing chamber; forming a plasma in the chamber; and depositing a coating material on the aluminum surface. In certain embodiments, the coating material comprises an amorphous carbon nitrogen containing layer. In certain embodiments, the article comprises a showerhead configured to deliver a gas to the processing chamber.

Abstract: Nano-porous low dielectric constant films are deposited utilizing materials having reactive by-products readily removed from a processing chamber by plasma cleaning. In accordance with one embodiment, an oxidizable silicon containing compound is reacted with an oxidizable non-silicon component having thermally labile groups, in a reactive oxygen ambient and in the presence of a plasma. The deposited silicon oxide film is annealed to form dispersed microscopic voids or pores that remain in the nano-porous silicon. Oxidizable non-silicon components with thermally labile groups that leave by-products readily removed from the chamber, include but are not limited to, limonene, carene, cymene, fenchone, vinyl acetate, methyl methacrylate, ethyl vinyl ether, tetrahydrofuran, furan, 2,5 Norbornadiene, cyclopentene, cyclopentene oxide, methyl cyclopentene, 2-cyclopentene-1-one, and 1-butene.

Abstract: Methods for forming silicon nitride hard masks are provided. The silicon nitride hard masks include carbon-doped silicon nitride layers and undoped silicon nitride layers. Carbon-doped silicon nitride layers that are deposited from a mixture comprising a carbon source compound, a silicon source compound, and a nitrogen source in the presence of RF power are provided. Also provided are methods of UV post-treating silicon nitride layers to provide silicon nitride hard masks. The carbon-doped silicon nitride layers and UV post-treated silicon nitride layers have desirable wet etch rates and dry etch rates for hard mask layers.

Abstract: An article having a protective coating for use in semiconductor applications and methods for making the same are provided. In certain embodiments, a method of coating an aluminum surface of an article utilized in a semiconductor processing chamber is provided. The method comprises providing a processing chamber; placing the article into the processing chamber; flowing a first gas comprising a carbon source into the processing chamber; flowing a second gas comprising a nitrogen source into the processing chamber; forming a plasma in the chamber; and depositing a coating material on the aluminum surface. In certain embodiments, the coating material comprises an amorphous carbon nitrogen containing layer. In certain embodiments, the article comprises a showerhead configured to deliver a gas to the processing chamber.

Abstract: Methods of forming boron-containing films are provided. The methods include introducing a boron-containing precursor into a chamber and depositing a network comprising boron-boron bonds on a substrate by thermal decomposition or a plasma process. The network may be post-treated to remove hydrogen from the network and increase the stress of the resulting boron-containing film. The boron-containing films have a stress between about ?10 GPa and 10 GPa and may be used as boron source layers or as strain-inducing layers.

Abstract: Adhesion between a copper metallization layer and a dielectric barrier film may be promoted by stabilizing a flow of a silicon-containing precursor in a divert line leading to the chamber exhaust. The stabilized gas flow is then introduced to the processing chamber to precisely form a silicide layer over the copper. This silicidation step creates a network of strong Cu—Si bonds that prevent delamination of the barrier layer, while not substantially altering the sheet resistance and other electrical properties of the resulting metallization structure.

Abstract: Methods are provided for processing a substrate for depositing an adhesion layer having a low dielectric constant between two low k dielectric layers. In one aspect, the invention provides a method for processing a substrate including introducing an organosilicon compound and an oxidizing gas at a first ratio of organosilicon compound to oxidizing gas into the processing chamber, generating a plasma of the oxidizing gas and the organosilicon compound to form an initiation layer on a barrier layer comprising at least silicon and carbon, introducing the organosilicon compound and the oxidizing gas at a second ratio of organosilicon compound to oxidizing gas greater than the first ratio into the processing chamber, and depositing a first dielectric layer adjacent the dielectric initiation layer.