Patents by Inventor Hideaki Kakiki

Hideaki Kakiki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10566966
    Abstract: A semiconductor device of the present invention suppresses high frequency noise caused in a semiconductor device incorporating SiC elements. The semiconductor device includes semiconductor elements connected in series, a SiC diode element connected in parallel to the semiconductor element, and an oscillation suppressing circuit being connected in parallel to the semiconductor element and the SiC diode element and suppressing voltage fluctuation caused in the SiC diode element in response to turn-ons of the semiconductor element. The oscillation suppressing circuit suppresses voltage fluctuation caused in the SiC diode element in response to turn-ons of the semiconductor element thereby improving reliability of the semiconductor device.
    Type: Grant
    Filed: June 25, 2018
    Date of Patent: February 18, 2020
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Naotaka Matsuda, Seiki Igarashi, Hideaki Kakiki, Susumu Iwamoto
  • Publication number: 20180309438
    Abstract: A semiconductor device of the present invention suppresses high frequency noise caused in a semiconductor device incorporating SiC elements. The semiconductor device includes semiconductor elements connected in series, a SiC diode element connected in parallel to the semiconductor element, and an oscillation suppressing circuit being connected in parallel to the semiconductor element and the SiC diode element and suppressing voltage fluctuation caused in the SiC diode element in response to turn-ons of the semiconductor element. The oscillation suppressing circuit suppresses voltage fluctuation caused in the SiC diode element in response to turn-ons of the semiconductor element thereby improving reliability of the semiconductor device.
    Type: Application
    Filed: June 25, 2018
    Publication date: October 25, 2018
    Inventors: Naotaka MATSUDA, Seiki IGARASHI, Hideaki KAKIKI, Susumu IWAMOTO
  • Patent number: 5043795
    Abstract: Provided is a semiconductor device for power switching applications which utilizes a plurality of gate terminals provided in pressure contact with gate electrodes, the gate terminal/electrodes situated so as separate current flow therethrough at time of gate turn off into separate components, thereby reducing the transverse voltage drop of the gate electrode. In one embodiment, the invention is applied to a gate turn off (GTO) thyristor, and in another embodiment, towards a reverse conducting GTO thyristor.
    Type: Grant
    Filed: April 11, 1990
    Date of Patent: August 27, 1991
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Yoshikazu Takahashi, Katuhiro Endo, Fumiaki Kirihata, Hideaki Kakiki