Patents by Inventor Hideaki Masuko
Hideaki Masuko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9414260Abstract: Arrangements with wireless transmitter having: transmission operation processing unit allocating first header information (FHI) including physical address (PA) information to a header, allocates first data error checking code (FDECC) for detecting an error of FHI, second header information (SHI) as redundant header information of FHI, second data error checking code (SDECC) for detecting an error of SHI, divides data field into cell units, and adds third error checking code to each cell, to generate the communication frame; and a wireless transmission unit. A wireless receiver with: wireless receiving unit receiving the frame; reception operation processing unit checking if errors exists in FHI based on FDECC allocated to data field, and if an error, further checks if error in SHI based on SDECC, and if no error, generates a predetermined PA by using SHI, and judges if received communication frame is addressed to own wireless receiver based on generated predetermined PA.Type: GrantFiled: August 26, 2014Date of Patent: August 9, 2016Assignee: HITACHI, LTD.Inventors: Setsuo Arita, Shinji Murata, Yuji Ichinose, Hideaki Masuko
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Patent number: 9208037Abstract: The present invention provides a duplexed operation processor control system that includes operation processors, an I/O device, and at least one communication path that couples the operation processors to the I/O device, and at least one communication path that couples the operation processors with each other. The duplexed operation processor control system switches over either of the operation processors to be a primary operation processor that executes a control operation for a control target, and the other to be a secondary operation processor that is in a stand-by state, and the secondary operation processor snoops control data synchronously when the primary operation processor acquires the control data from the control target.Type: GrantFiled: June 18, 2009Date of Patent: December 8, 2015Assignees: HITACHI, LTD., HITACHI INDUSTRY & CONTROL SOLUTIONS, LTD.Inventors: Toshiki Shimizu, Akira Bando, Yusaku Otsuka, Yasuhiro Kiyofuji, Eiji Kobayashi, Akihiro Onozuka, Satoru Funaki, Masakazu Ishikawa, Hideaki Masuko, Yusuke Seki, Wataru Sasaki, Naoya Mashiko, Akihiro Nakano, Shin Kokura, Shoichi Ozawa, Yu Iwasaki
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Publication number: 20140362680Abstract: Arrangements with wireless transmitter having: transmission operation processing unit allocating first header information (FHI) including physical address (PA) information to a header, allocates first data error checking code (FDECC) for detecting an error of FHI, second header information (SHI) as redundant header information of FHI, second data error checking code (SDECC) for detecting an error of SHI, divides data field into cell units, and adds third error checking code to each cell, to generate the communication frame; and a wireless transmission unit. A wireless receiver with: wireless receiving unit receiving the frame; reception operation processing unit checking if errors exists in FHI based on FDECC allocated to data field, and if an error, further checks if error in SHI based on SDECC, and if no error, generates a predetermined PA by using SHI, and judges if received communication frame is addressed to own wireless receiver based on generated predetermined PA.Type: ApplicationFiled: August 26, 2014Publication date: December 11, 2014Inventors: Setsuo ARITA, Shinji MURATA, Yuji ICHINOSE, Hideaki MASUKO
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Patent number: 8817851Abstract: Disclosed is a wireless communications device with strong realtime performance, giving rise to no latency in communications even if communications errors arise in the communication frame MAC header. MAC header information is used to determine whether or not the destination address of a received data frame is the address of a concerned wireless communications device (1). MAC header information allocated among a plurality of MAC headers is employed in selecting MAC header information without errors. If all MAC header information is in error, a majority determination processing unit (13) is used to effect a majority determination of the MAC header information and generate correct MAC header information. A received data extraction unit (14) removes the received frame header, etc., extracts the received data, and outputs same to an external device.Type: GrantFiled: February 15, 2011Date of Patent: August 26, 2014Assignee: Hitachi, Ltd.Inventors: Setsuo Arita, Shinji Murata, Yuji Ichinose, Hideaki Masuko
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Publication number: 20120314741Abstract: Disclosed is a wireless communications device with strong realtime performance, giving rise to no latency in communications even if communications errors arise in the communication frame MAC header. MAC header information is used to determine whether or not the destination address of a received data frame is the address of a concerned wireless communications device (1). MAC header information allocated among a plurality of MAC headers is employed in selecting MAC header information without errors. If all MAC header information is in error, a majority determination processing unit (13) is used to effect a majority determination of the MAC header information and generate correct MAC header information. A received data extraction unit (14) removes the received frame header, etc., extracts the received data, and outputs same to an external device.Type: ApplicationFiled: February 15, 2011Publication date: December 13, 2012Inventors: Setsuo Arita, Shinji Murata, Yuji Ichinose, Hideaki Masuko
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Publication number: 20090319756Abstract: The present invention provides a duplexed operation processor control system that includes operation processors, an I/O device, and at least one communication path that couples the operation processors to the I/O device, and at least one communication path that couples the operation processors with each other. The duplexed operation processor control system switches over either of the operation processors to be a primary operation processor that executes a control operation for a control target, and the other to be a secondary operation processor that is in a stand-by state, and the secondary operation processor snoops control data synchronously when the primary operation processor acquires the control data from the control target.Type: ApplicationFiled: June 18, 2009Publication date: December 24, 2009Inventors: Toshiki Shimizu, Akira Bando, Yusaku Otsuka, Yasuhiro Kiyofuji, Elji Kobayashi, Akihiro Onozuka, Satoru Funaki, Masakazu Ishikawa, Hideaki Masuko, Yusuke Seki, Wataru Sasaki, Naoya Mashiko, Akihiro Nakano, Shin Kokura, Shoichi Ozawa, Yu Iwasaki
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Patent number: 7169327Abstract: The dielectric-forming composition according to the invention is characterized by consisting of: composite particles for dielectrics in which part or all of the surfaces of inorganic particles with permittivity of 30 or greater are coated with a conductive metal or a compound thereof, or a conductive organic compound or a conductive inorganic material; and (B) a resin component constituted of at least one of a polymerizable compound and a polymer. In addition, another dielectric-forming composition according to the invention is characterized by containing: ultrafine particle-resin composite particles composed of (J) inorganic ultrafine particles with the average particle size of 0.Type: GrantFiled: January 24, 2002Date of Patent: January 30, 2007Assignee: JSR CorporationInventors: Nobuyuki Ito, Hideaki Masuko, Satomi Hasegawa, Nakaatsu Yoshimura
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Patent number: 7015256Abstract: A photosensitive composition for forming a dielectric of the present invention comprising inorganic particles, an alkali developable resin and additives, wherein the additives comprise a compound having a quinonediazido group (C1), a compound containing at least two alkyletherified amino groups in the molecule (C2) and a thermal acid generator (C3), or wherein the inorganic particles comprise inorganic superfine particles (A-I) having a mean particle diameter of less than 0.05 ?m and inorganic fine particles (A-II) having a mean particle diameter of not less than 0.05 ?m. The composition can be calcined at low temperatures to form a dielectric layer with high dimensional precision, said layer having a high dielectric constant and a low dielectric loss. Also provided are a dielectric and an electronic part prepared from the composition.Type: GrantFiled: December 26, 2002Date of Patent: March 21, 2006Assignee: JSR CorporationInventors: Nobuyuki Ito, Hideaki Masuko, Satomi Hasegawa, Atsushi Ito, Katsumi Inomata
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Patent number: 6934516Abstract: Occurrence of significant difference of transmission rate between communication zones can be prevented to maintain the transmission rate of overall network uniform. The radio network system includes a plurality of radio communication control units are connected with each other via radio main line, and each radio communication control unit has a communication function with at least one radio communication terminal arranged within own communication area.Type: GrantFiled: June 5, 2003Date of Patent: August 23, 2005Assignee: Hitachi, Ltd.Inventors: Tomoyuki Harada, Takuji Hamada, Hideaki Masuko, Shinichi Hanada, Yoshiaki Adachi, Hisao Ogawa
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Patent number: 6890663Abstract: A process for forming an inorganic material layer pattern on a substrate. The process includes the steps of transferring an inorganic powder dispersed paste layer supported on a support film to the surface of the substrate to form the inorganic powder dispersed paste layer on the substrate; forming a resist film on the inorganic powder dispersed paste layer transferred to the surface of the substrate; exposing the resist film to light through a mask to form a latent image of a resist pattern; developing the exposed resist film to form the resist pattern; etching exposed portions of the inorganic powder dispersed paste layer to form an inorganic powder dispersed paste layer pattern corresponding to the resist pattern; and baking the pattern to form an inorganic material layer pattern.Type: GrantFiled: October 23, 2002Date of Patent: May 10, 2005Assignee: JSR CorporationInventors: Hideaki Masuko, Tadahiko Udagawa, Hiroaki Nemoto, Nobuo Bessho
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Publication number: 20040094752Abstract: A photosensitive composition for forming a dielectric of the present invention comprising inorganic particles, an alkali developable resin and additives, wherein the additives comprise a compound having a quinonediazido group (C1), a compound containing at least two alkyletherified amino groups in the molecule (C2) and a thermal acid generator (C3), or wherein the inorganic particles comprise inorganic superfine particles (A-I) having a mean particle diameter of less than 0.05 &mgr;m and inorganic fine particles (A-II) having a mean particle diameter of not less than 0.05 &mgr;m.Type: ApplicationFiled: September 26, 2003Publication date: May 20, 2004Inventors: Nobuyuki Ito, Hideaki Masuko, Satomi Hasegawa, Atsushi Ito, Katsumi Inomata
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Patent number: 6728541Abstract: A plurality of radio relay stations 1 are connected so that bi-directional ring-like paths are made up of radio transmission paths. The respective radio relay stations 1 bidirectionally transmit data inputted from terminals placed thereunder onto the bidirectional ring-like paths respectively. The respective data are respectively received by radio relay stations 2 having data destination terminals placed thereunder along the bidirectional ring-like paths. Each radio relay station, which has received the data destined for the terminals placed thereunder from both directions, transmits earlier incoming data to each terminal placed thereunder and discards later incoming data. Thus, a radio relay system can be implemented which is capable of relaying data with a high degree of reliability.Type: GrantFiled: February 23, 2001Date of Patent: April 27, 2004Assignee: Hitachi, Ltd.Inventors: Yoshinori Ohkura, Masahiro Takahashi, Hideaki Masuko, Shinichi Ueda, Takuji Hamada
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Publication number: 20030194972Abstract: Occurrence of significant difference of transmission rate between communication zones can be prevented to maintain the transmission rate of overall network uniform. The radio network system includes a plurality of radio communication control units are connected with each other via radio main line, and each radio communication control unit has a communication function with at least one radio communication terminal arranged within own communication area.Type: ApplicationFiled: June 5, 2003Publication date: October 16, 2003Applicant: Hitachi, Ltd.Inventors: Tomoyuki Harada, Takuji Hamada, Hideaki Masuko, Shinichi Hanada, Yoshiaki Adachi, Hisao Ogawa
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Patent number: 6625421Abstract: Occurrence of significant difference of transmission rate between communication zones can be prevented to maintain the transmission rate of overall network uniform. The radio network system includes a plurality of radio communication control units are connected with each other via radio main line, and each radio communication control unit has a communication function with at least one radio communication terminal arranged within own communication area.Type: GrantFiled: September 12, 2000Date of Patent: September 23, 2003Assignee: Hitachi, Ltd.Inventors: Tomoyuki Harada, Takuji Hamada, Hideaki Masuko, Shinichi Hanada, Yoshiaki Adachi, Hisao Ogawa
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Publication number: 20030151032Abstract: The dielectric-forming composition according to the invention is characterized by consisting of:Type: ApplicationFiled: September 30, 2002Publication date: August 14, 2003Inventors: Nobuyuki Ito, Hideaki Masuko, Satomi Hasegawa, Nakaatsu Yoshimura
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Patent number: 6572963Abstract: A process for forming an inorganic material layer pattern on a substrate. The process includes the steps of transferring an inorganic powder dispersed paste layer supported on a support film to the surface of the substrate to form the inorganic powder dispersed paste layer on the substrate; forming a resist film on the inorganic powder dispersed paste layer transferred to the surface of the substrate; exposing the resist film to light through a mask to form a latent image of a resist pattern; developing the exposed resist film to form the resist pattern; etching exposed portions of the inorganic powder dispersed paste layer to form an inorganic powder dispersed paste layer pattern corresponding to the resist pattern; and baking the pattern to form an inorganic material layer pattern.Type: GrantFiled: October 17, 2001Date of Patent: June 3, 2003Assignee: JSR CorporationInventors: Hideaki Masuko, Tadahiko Udagawa, Hiroaki Nemoto, Nobuo Bessho
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Publication number: 20030049412Abstract: A process for forming an inorganic material layer pattern on a substrate. The process includes the steps of transferring an inorganic powder dispersed paste layer supported on a support film to the surface of the substrate to form the inorganic powder dispersed paste layer on the substrate; forming a resist film on the inorganic powder dispersed paste layer transferred to the surface of the substrate; exposing the resist film to light through a mask to form a latent image of a resist pattern; developing the exposed resist film to form the resist pattern; etching exposed portions of the inorganic powder dispersed paste layer to form an inorganic powder dispersed paste layer pattern corresponding to the resist pattern; and baking the pattern to form an inorganic material layer pattern.Type: ApplicationFiled: October 23, 2002Publication date: March 13, 2003Applicant: JSR CORPORATIONInventors: Hideaki Masuko, Tadahiko Udagawa, Hiroaki Nemoto, Nobuo Bessho
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Publication number: 20020034611Abstract: A process for forming an inorganic material layer pattern on a substrate. The process includes the steps of transferring an inorganic powder dispersed paste layer supported on a support film to the surface of the substrate to form the inorganic powder dispersed paste layer on the substrate; forming a resist film on the inorganic powder dispersed paste layer transferred to the surface of the substrate; exposing the resist film to light through a mask to form a latent image of a resist pattern; developing the exposed resist film to form the resist pattern; etching exposed portions of the inorganic powder dispersed paste layer to form an inorganic powder dispersed paste layer pattern corresponding to the resist pattern; and baking the pattern to form an inorganic material layer pattern.Type: ApplicationFiled: October 17, 2001Publication date: March 21, 2002Applicant: JSR CORPORATION, A JAPANESE CORPORATIONInventors: Hideaki Masuko, Tadahiko Udagawa, Hiroaki Nemoto, Nobuo Bessho
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Patent number: 6337028Abstract: A process for forming an inorganic material layer pattern on a substrate. The process includes the steps of transferring an inorganic powder dispersed paste layer supported on a support film to the surface of the substrate to form the inorganic powder dispersed paste layer on the substrate; forming a resist film on the inorganic powder dispersed paste layer transferred to the surface of the substrate; exposing the resist film to light through a mask to form a latent image of a resist pattern; developing the exposed resist film to form the resist pattern; etching exposed portions of the inorganic powder dispersed paste layer to form an inorganic powder dispersed paste layer pattern corresponding to the resist pattern; and baking the pattern to form an inorganic material layer pattern.Type: GrantFiled: November 10, 1998Date of Patent: January 8, 2002Assignee: JSR CorporationInventors: Hideaki Masuko, Tadahiko Udagawa, Hiroaki Nemoto, Nobuo Bessho
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Patent number: 6299785Abstract: A process for the preparation of an electrode, which comprises: (1) transferring a conductive paste layer supported on a base film to a substrate to form the conductive paste layer on the substrate; (2) forming a resist film on the conductive paste layer transferred to the substrate; (3) exposing the resist film through a mask to form a resist pattern latent image; (4) developing the exposed resist film to form a resist pattern; (5) etching exposed portions of the conductive paste layer to form a conductive paste layer pattern corresponding to the resist pattern; and (6) thermosetting the pattern to form a conductive layer pattern.Type: GrantFiled: April 22, 1999Date of Patent: October 9, 2001Assignee: JSR CorporationInventors: Tsutomu Shimokawa, Hideaki Masuko, Hiroaki Nemoto, Nobuo Bessho