Patents by Inventor Hideaki Wada

Hideaki Wada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11953708
    Abstract: A camera device includes a first filter configured to restrict a transverse wave component of incident light having light of a plurality of different wavelength bands generated based on birefringence in a car film from a vehicle to which the car film is adhered, a lens on which a vertical wave component of the incident light transmitted through the first filter is incident, a second filter configured to restrict a vertical wave component of the incident light in a visible region among the vertical wave component of the incident light imaged by the lens, and an imaging element configured to image the vehicle as a subject based on a vertical wave component of the incident light in a near-infrared region transmitted through the second filter.
    Type: Grant
    Filed: January 19, 2021
    Date of Patent: April 9, 2024
    Assignee: I-PRO CO., LTD.
    Inventors: Hideaki Yamada, Jyouji Wada, Toshiyuki Sano, Akito Omata, Yuma Kobayashi, Naoaki Tomisaka
  • Patent number: 7876207
    Abstract: In a wake-up control device for waking up a peripheral circuit such as a transmitter/receiver in a radio communication device, during a standby time in which an RF unit and a processing unit are powered off by a switch, an RF signal is received to produce a detection signal by a detector. The detection signal is transferred to the wake-up controller to be sampled. The header and other fields are detected and counted. A control signal is in turn produced by the respective counts to turn on the switch.
    Type: Grant
    Filed: August 28, 2007
    Date of Patent: January 25, 2011
    Assignee: Oki Semiconductor Co., Ltd.
    Inventors: Hideaki Wada, Hirosuke Tabata
  • Publication number: 20080247449
    Abstract: The object of the invention is to checking the timing easily and in shorter time, and reduce the power consumption without any influence on other circuits functions. The solutions are as follows. By the “1” detecting counter, the “0” detecting counter, and the data validity judging circuit in the checking circuit of transmission control included in the DSRC baseband circuit of the transmission apparatus, it becomes the possible to judge the data validity of the transmission data TX_DI—0. Additionally, by the transmission enable counter 23 and the matched transmission-start-timing judging circuit, it becomes possible to judge the transmission-start-timings of the transmission enable signal TXW_N—0 and the transmission data TX_DI—0. Furthermore, by the transmission-end-timing judging circuit, it becomes possible to judge the end timing of each slot type of the transmission data.
    Type: Application
    Filed: March 13, 2008
    Publication date: October 9, 2008
    Applicant: OKI ELECTRIC INDUSTRY CO., LTD.
    Inventor: Hideaki WADA
  • Publication number: 20080055099
    Abstract: In a wake-up control device for waking up a peripheral circuit such as a transmitter/receiver in a radio communication device, during a standby time in which an RF unit and a processing unit are powered off by a switch, an RF signal is received to produce a detection signal by a detector. The detection signal is transferred to the wake-up controller to be sampled. The header and other fields are detected and counted. A control signal is in turn produced by the respective counts to turn on the switch.
    Type: Application
    Filed: August 28, 2007
    Publication date: March 6, 2008
    Inventors: Hideaki Wada, Hirosuke Tabata
  • Publication number: 20070066383
    Abstract: Disclosed is a gaming machine. According to the gaming machine, when a combination of symbols relating to a winning is displayed on a one line, the symbols constituting the combination of symbols relating to the winning and symbols constituting a combination of specific symbols in accordance with the combination of symbols relating to the winning are respectively arranged on peripheries of reels so that the combination of specific symbols is displayed on a line different from the one line. In addition, an image display unit of the gaming machine displays a specific image representing a corresponding relationship between a prize in accordance with the combination of symbols relating to the winning and the combination of specific symbols in accordance with the combination of symbols relating to the winning.
    Type: Application
    Filed: March 28, 2006
    Publication date: March 22, 2007
    Applicant: Aruze Corp.
    Inventors: Koichi Mori, Nakayasu Tsukahara, Hideaki Wada, Kuniaki Honno, Hiroshi Irimajiri, Takumi Nishi, Hiroaki Oosera, Akio Fujita, Yusuke Kikuchi
  • Patent number: 7165183
    Abstract: An interrupt signal EMG is put out to a microprocessor 10 when a thermal monitor 40 detects that a package temperature exceeds a reference. The microprocessor then increases a frequency division value N stored in a frequency division value register 31 of a clock mechanism 30. An inputted clock signal MCK is divided by N to generate a system clock signal SCK. Therefore, the frequency of system clock signal SCK decreases when N increases. Consequently, electricity consumption of each function module 20i decreases and the package temperature is reduced.
    Type: Grant
    Filed: October 31, 2002
    Date of Patent: January 16, 2007
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Atsuhiko Okada, Hideaki Wada, Mitsuaki Watanabe, Hajime Iwai, Hirosuke Tabata, Shingo Kazuma
  • Publication number: 20030226084
    Abstract: An interrupt signal EMG is put out to microprocessor 10 when package temp. is detected by thermal monitor 40 that it exceeded reference temp. Thus, rewriting of frequency division value N of freq.div.val.register 31 in clock gear mec. 30 to increase it is performed by microprocessor 10. In frequency division circuit 32, inputted clock signal MCK is divided into 1/N by freq.div.value N set in freq.div.val.register 31, so as to generate system clock signal SCK. Therefore, frequency of system clock signal SCK decreases with the increase of freq.div.value N. Consequently, electricity consumption of each module 20i decreases, increase of package temp. is restrained, and malfunction from overheat can be prevented.
    Type: Application
    Filed: October 31, 2002
    Publication date: December 4, 2003
    Inventors: Atsuhiko Okada, Hideaki Wada, Mitsuaki Watanabe, Hajime Iwai, Hirosuke Tabata, Shingo Kazuma
  • Patent number: 6191991
    Abstract: In a data rate converter, input data received in series synchronously with an input clock signal is converted into parallel data so as to be written into a memory, and the written parallel data is read from the memory and converted into serial data synchronously with an output clock signal so as to be outputted. Clock pulses of the input clock signal are counted to obtain an input count value. A ready signal is produced based on the input count value for allowing the start of reading the parallel data from the memory. The ready signal has a pulse width greater than two periods of the output clock signal. A trigger signal is produced upon detection of the second leading or trailing edge of the output clock signal within the pulse width of the ready signal. In response to the trigger signal, clock pulses of the output clock signal are counted to obtain an output count value. A read signal is produced based on the output count value for reading the parallel data from the memory.
    Type: Grant
    Filed: March 28, 2000
    Date of Patent: February 20, 2001
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Hideaki Wada
  • Patent number: 5045638
    Abstract: This invention relates to an apparatus for shielding electromagnetic radiation which includes a casing made primarily of electromagnetic shielding material and an electromagnetic wave suppressor member having high permeability and/or permittivity. A method for using this apparatus also is described. The suppressor member has a high dielectric loss and/or high magnetic loss at a location close to the place in the casing where electromagnetic waves are less shielded, thereby reducing leakage of undesirable electromagnetic waves from the casing.
    Type: Grant
    Filed: May 18, 1989
    Date of Patent: September 3, 1991
    Assignee: Mitsubishi Mining & Cement Co., Ltd.
    Inventors: Hideaki Wada, Naoto Kitahara, Masami Koshimura, Mikiya Ono