Patents by Inventor Hideaki YANAGIDA

Hideaki YANAGIDA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210167254
    Abstract: A terahertz device includes a terahertz element, a sealing resin, a wiring layer and a frame-shaped member. The terahertz element that performs conversion between terahertz waves and electric energy. The terahertz element has an element front surface and an element back surface spaced apart from each other in a first direction. The sealing resin covers the terahertz element. The wiring layer is electrically connected to the terahertz element. A frame-shaped member is made of a conductive material and arranged around the terahertz element as viewed in the first direction. The frame-shaped member has a reflective surface capable of reflecting the terahertz waves.
    Type: Application
    Filed: July 26, 2019
    Publication date: June 3, 2021
    Inventors: Kazuisao TSURUDA, Jaeyoung KIM, Hideaki YANAGIDA, Toshikazu MUKAI
  • Publication number: 20210098374
    Abstract: There is provided a terminal that includes a first conductive layer; a wiring layer on the first conductive layer; a second conductive layer on the wiring layer; and a conductive bonding layer which is in contact with a bottom surface and a side surface of the first conductive layer, a side surface of the wiring layer, a portion of a side surface of the second conductive layer, and a portion of a bottom surface of the second conductive layer, wherein an end portion of the second conductive layer protrudes from an end portion of the first conductive layer and an end portion of the wiring layer, and wherein the conductive bonding layer is in contact with a bottom surface of the end portion of the second conductive layer.
    Type: Application
    Filed: August 26, 2020
    Publication date: April 1, 2021
    Inventors: Hideaki YANAGIDA, Yoshihisa TAKADA
  • Publication number: 20200411425
    Abstract: A semiconductor device includes: a substrate including a main surface; a wiring portion including a first conductive layer formed on the main surface, and a first plating layer which is provided on the first conductive layer and on which an oxide film is formed; a semiconductor element including an element mounting surface and an element electrode formed on the element mounting surface; a bonding portion including a second plating layer made of the same material as the first plating layer and laminated on the first conductive layer, and a solder layer laminated on the second plating layer and bonded to the element electrode; and a sealing resin covering the semiconductor element.
    Type: Application
    Filed: June 5, 2020
    Publication date: December 31, 2020
    Inventors: Isamu NISHIMURA, Hirofumi TAKEDA, Hideaki YANAGIDA, Taro HAYASHI, Natsuki SAKAMOTO
  • Patent number: 10879146
    Abstract: An electronic component includes a substrate which has a first major surface on one side and a second major surface on the other side, a chip which has a mounting surface on one side and a non-mounting surface on the other side and is disposed on the first major surface of the substrate in a posture that the mounting surface faces the first major surface of the substrate, a sealing insulation layer which seals the chip so as to expose the non-mounting surface above the first major surface of the substrate, and a cover layer which covers the non-mounting surface of the chip.
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: December 29, 2020
    Assignee: ROHM CO., LTD.
    Inventor: Hideaki Yanagida
  • Patent number: 10804190
    Abstract: A multi-chip module includes a plurality of chip parts with each chip part having an electrode, a sealing resin for sealing the plurality of chip parts, and an external connection terminal secured to the sealing resin so as to be exposed from the outer surface of the sealing resin and electrically connected to the electrode of at least one of the chip parts.
    Type: Grant
    Filed: June 13, 2016
    Date of Patent: October 13, 2020
    Assignee: ROHM CO., LTD.
    Inventors: Mamoru Yamagami, Yasuhiro Fuwa, Hideaki Yanagida, Takafumi Okada
  • Publication number: 20200273834
    Abstract: An electronic device of the present disclosure includes: a first resin layer (21) having a first resin layer main surface and a first resin layer inner surface; a columnar conductor having a columnar conductor main surface and a columnar conductor inner surface and penetrating the first resin layer in direction z; a wiring layer connecting the first resin layer main surface and the first conductor main surface; an electronic component having a component main surface facing the same side as the first resin layer main surface and a component inner surface facing the same side as the first resin layer inner surface and being electrically connected and joined to the wiring layer; a second resin layer having a second resin layer main surface facing the same direction as the first resin layer main surface and a second resin layer inner surface being in contact with the first resin layer main surface, covering the wiring layer and the electronic component; and an external electrode closer to the side where the first
    Type: Application
    Filed: December 5, 2019
    Publication date: August 27, 2020
    Inventor: HIDEAKI YANAGIDA
  • Patent number: 10658304
    Abstract: A semiconductor device includes an electroconductive shielding layer, an isolation layer formed with a frame-shaped opening, a wiring layer on the isolation layer to be surrounded by the opening, a semiconductor element on the wiring layer with its back surface facing the wiring layer, electroconductive pillars spaced apart from the semiconductor element and standing on the wiring layer, and an electroconductive frame standing on an exposed region of the shielding layer through the opening, with the frame surrounding the semiconductor element and the electroconductive pillars. The semiconductor device further includes an electrically insulating sealing resin that covers the wiring layer and the semiconductor element, and the frame is configured to be electrically connected to an external ground terminal.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: May 19, 2020
    Assignee: ROHM CO., LTD.
    Inventor: Hideaki Yanagida
  • Publication number: 20190311965
    Abstract: An electronic component includes a substrate which has a first major surface on one side and a second major surface on the other side, a chip which has a mounting surface on one side and a non-mounting surface on the other side and is disposed on the first major surface of the substrate in a posture that the mounting surface faces the first major surface of the substrate, a sealing insulation layer which seals the chip so as to expose the non-mounting surface above the first major surface of the substrate, and a cover layer which covers the non-mounting surface of the chip.
    Type: Application
    Filed: April 2, 2019
    Publication date: October 10, 2019
    Inventor: Hideaki YANAGIDA
  • Publication number: 20190164906
    Abstract: A semiconductor device includes an electroconductive shielding layer, an isolation layer formed with a frame-shaped opening, a wiring layer on the isolation layer to be surrounded by the opening, a semiconductor element on the wiring layer with its back surface facing the wiring layer, electroconductive pillars spaced apart from the semiconductor element and standing on the wiring layer, and an electroconductive frame standing on an exposed region of the shielding layer through the opening, with the frame surrounding the semiconductor element and the electroconductive pillars. The semiconductor device further includes an electrically insulating sealing resin that covers the wiring layer and the semiconductor element, and the frame is configured to be electrically connected to an external ground terminal.
    Type: Application
    Filed: November 28, 2018
    Publication date: May 30, 2019
    Applicant: ROHM CO., LTD.
    Inventor: Hideaki YANAGIDA
  • Patent number: 10276463
    Abstract: A semiconductor device includes a substrate with a recess subsiding from a selected surface of the substrate to accommodate a semiconductor element. Connected to the semiconductor element, an electroconductive portion extends from the recess onto the selected surface. A post, formed at the selected surface, has a first surface in contact with the electroconductive portion, a second surface, and a side surface between the first and second surfaces. A sealing resin covers the side surface of the post and the semiconductor element, and has a mounting surface facing in the same direction as the selected surface of the substrate. A pad, on the mounting surface of the sealing resin, is in contact with the second surface of the post. In the thickness direction, the second surface of the post is offset from the mounting surface of the sealing resin toward the selected surface of the substrate.
    Type: Grant
    Filed: October 9, 2017
    Date of Patent: April 30, 2019
    Assignee: ROHM CO., LTD.
    Inventor: Hideaki Yanagida
  • Patent number: 10163775
    Abstract: The present disclosure provides an electronic device suitable for miniaturization.
    Type: Grant
    Filed: February 16, 2016
    Date of Patent: December 25, 2018
    Assignee: ROHM CO., LTD.
    Inventor: Hideaki Yanagida
  • Publication number: 20180108582
    Abstract: A semiconductor device includes a substrate with a recess subsiding from a selected surface of the substrate to accommodate a semiconductor element. Connected to the semiconductor element, an electroconductive portion extends from the recess onto the selected surface. A post, formed at the selected surface, has a first surface in contact with the electroconductive portion, a second surface, and a side surface between the first and second surfaces. A sealing resin covers the side surface of the post and the semiconductor element, and has a mounting surface facing in the same direction as the selected surface of the substrate. A pad, on the mounting surface of the sealing resin, is in contact with the second surface of the post. In the thickness direction, the second surface of the post is offset from the mounting surface of the sealing resin toward the selected surface of the substrate.
    Type: Application
    Filed: October 9, 2017
    Publication date: April 19, 2018
    Inventor: Hideaki YANAGIDA
  • Publication number: 20170125319
    Abstract: The present invention provides an electronic component in which a molding resin completely fills the space between a chip component and a mounting substrate, thereby avoiding the corrosion of the chip component and mounting substrate. The electronic component includes an interposer as an example of a mounting substrate and a chip component. The interposer is disposed with a first wiring film and a second wiring film. The chip component is interposed between a first connection electrode and a second connection electrode so as to electrically and mechanically connect the first wiring film and the second wiring film. The first connection electrode and the second connection electrode are shaped as pins mounted upright from the first wiring film and second wiring film toward the chip component such that the chip component floats above the interposer and is connected to the first wiring film and the second wiring film.
    Type: Application
    Filed: November 1, 2016
    Publication date: May 4, 2017
    Applicant: ROHM CO., LTD.
    Inventor: Hideaki YANAGIDA
  • Patent number: 9585254
    Abstract: An electronic device includes a semiconductor substrate, an electronic element mounted on the substrate, a conductive layer electrically connected to the electronic element, a sealing resin and a columnar conductor. The substrate has a recess formed in its obverse surface. The electronic element is mounted on the bottom surface of the recess. The conductive layer has an obverse-surface contacting region located on the obverse surface of the substrate. The sealing resin is disposed in at least a part of the recess for covering at least a part of the obverse surface of the substrate. The columnar conductor is electrically connected to the obverse-surface contacting region of the conductive layer and exposed from the sealing resin at a side opposite to the obverse surface of the substrate.
    Type: Grant
    Filed: February 4, 2016
    Date of Patent: February 28, 2017
    Assignee: ROHM CO., LTD.
    Inventors: Isamu Nishimura, Hideaki Yanagida, Michihiko Mifuji, Yasuhiro Fuwa
  • Publication number: 20170034916
    Abstract: A multi-chip module includes a plurality of chip parts with each chip part having an electrode, a sealing resin for sealing the plurality of chip parts, and an external connection terminal secured to the sealing resin so as to be exposed from the outer surface of the sealing resin and electrically connected to the electrode of at least one of the chip parts.
    Type: Application
    Filed: June 13, 2016
    Publication date: February 2, 2017
    Applicant: ROHM CO., LTD.
    Inventors: Mamoru YAMAGAMI, Yasuhiro FUWA, Hideaki YANAGIDA, Takafumi OKADA
  • Publication number: 20160242294
    Abstract: The present disclosure provides an electronic device suitable for miniaturization.
    Type: Application
    Filed: February 16, 2016
    Publication date: August 18, 2016
    Inventor: Hideaki YANAGIDA
  • Publication number: 20160242292
    Abstract: An electronic device includes a semiconductor substrate, an electronic element mounted on the substrate, a conductive layer electrically connected to the electronic element, a sealing resin and a columnar conductor. The substrate has a recess formed in its obverse surface. The electronic element is mounted on the bottom surface of the recess. The conductive layer has an obverse-surface contacting region located on the obverse surface of the substrate. The sealing resin is disposed in at least a part of the recess for covering at least a part of the obverse surface of the substrate. The columnar conductor is electrically connected to the obverse-surface contacting region of the conductive layer and exposed from the sealing resin at a side opposite to the obverse surface of the substrate.
    Type: Application
    Filed: February 4, 2016
    Publication date: August 18, 2016
    Inventors: Isamu NISHIMURA, Hideaki YANAGIDA, Michihiko MIFUJI, Yasuhiro FUWA