Patents by Inventor Hidefumi Kimura

Hidefumi Kimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180068320
    Abstract: Analysis of the cause of a failure is started within a short period of time after the occurrence ensuring a longer period of time to narrow down the target range of products assumed to contain a failure actualization risk of the same type. When first ID information is received from a semiconductor device with a failure actualized, second ID list information containing a failure actualization risk of the same type based on manufacturing history information is extracted using the first ID as a key, and is broadcast to an automobile. When a failure is detected, third ID information stored in a nonvolatile memory is transmitted to a semiconductor product quality management server. When the second ID list information is received, information related to the failure actualization risk of the same type is output to a driver depending on whether or not the third ID is included in the list information.
    Type: Application
    Filed: June 5, 2017
    Publication date: March 8, 2018
    Inventors: Naoki YAMADA, Yoshiyuki MATSUMOTO, Hidefumi KIMURA
  • Patent number: 4751469
    Abstract: This invention relates to a phase coincidence detector for examining whether or not two input digital signals are coincident by utilizing a delay signal and an advance signal of a digital phase comparator which examines the phase difference between the two input digital signals and outputs the delay signal representing the delay of one of the input signals to the other and the advance signal representing the advance of one of the input signals to the other. Particularly, the output signals of the phase comparator, that is, the delay signal and the advance signal, are periodic pulse signals, and residual pulses having a small pulse width occur periodically even at the time of coincidence.
    Type: Grant
    Filed: May 22, 1987
    Date of Patent: June 14, 1988
    Assignees: Hitachi Ltd., Hitachi Video Eng. Inc.
    Inventors: Junichi Nakagawa, Hidefumi Kimura, Yoshitomo Kuwamoto, Masanori Ienaka, Hideaki Watanabe
  • Patent number: 4743864
    Abstract: In an intermittently operative phase-locked loop, in order to prevent the oscillator frequency from significantly changing at the time of turning on of an electric power source, a point in time at which a phase difference between clock signals respectively fed to a reference frequency divider and to a frequency divider for dividing the output frequency of a voltage-controlled oscillator becomes substantially zero is detected, and the two frequency dividers are initialized when the above-mentioned point in time is detected after turning on of the electric power source.
    Type: Grant
    Filed: October 23, 1986
    Date of Patent: May 10, 1988
    Assignees: Hitachi, Ltd, Hitachi Video Engineering, Inc.
    Inventors: Jun'ichi Nakagawa, Yoshitomo Kuwamoto, Hidefumi Kimura, Hideaki Watanabe, Masanori Ienaka