Abstract: There are provided a drawing device and an information processing apparatus which are capable of reading out texture data from a memory at a high speed. A storage circuit stores respective information items of each of texture pixels constituting the texture data and at least one texture pixel in a vicinity of the each of the texture pixels, in a continuously-accessible region thereof. An address calculation circuit calculates, based on texture coordinates corresponding to each pixel of the polygons, an address where a corresponding set of the information items are stored. A readout circuit reads out the corresponding set of the information items from the address calculated by the address calculation circuit. A synthesis circuit synthesizes the corresponding set of the information items read out by the readout circuit. A drawing circuit draws, based on texture pixel information synthesized by the synthesis circuit, a corresponding pixel of the polygons.

Abstract: A device for extending functions of a computer connected thereto adds a new function to functions of an existing extension unit. The device includes a non-volatile memory and a new extension unit connected to the non-volatile memory and capable of being connected to the computer via a bus and to the existing extension unit. The new extension unit transfers what is stored in the non-volatile memory to the computer when the computer requests attribute information of the existing extension unit.

Abstract: An apparatus includes a memory which stores therein data of a dotted-line pattern, a unit which identifies successive pixels on a straight line to be drawn with respect to each line of a plurality of straight lines that are drawn side by side, a pattern reference unit which refers to the data of a dotted-line pattern while changing a reference address for accessing the memory in accordance with a slope of a dotted line to be drawn, and a drawing unit which draws the successive pixels in response to the data of a dotted-line pattern referred to by the pattern reference unit.

Abstract: A binary program conversion apparatus capable of converting an original binary program into a new binary program which runs at higher speed in a target computer having a cache memory. The binary program conversion apparatus comprises an executing part, a generating part and a producing part. The executing part executes the original binary program. The generating part generates executed blocks information indicating first instruction blocks which are executed by the executing part. The producing part produces, based on the executed blocks information generated by the generating part, the new binary program which contains second instruction blocks corresponding to the plural of the first instruction blocks and which causes, when being executed in the computer, the computer to store second instruction blocks corresponding to the first instruction blocks executed by the executing part at different locations of the cache memory.