Patents by Inventor Hidehisa Yamazaki

Hidehisa Yamazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6243946
    Abstract: An interlayer connection structure in a circuit board characterized in that a local part of a conductive circuit layer disposed at one surface side of an insulative sheet is bent inwardly of the insulative sheet so that an apex of a projectingly bent portion is formed, and the apex of the projectingly bent portion is abutted with another conductive circuit layer disposed at the other surface side of the insulative sheet so that an interlayer connection is established therebetween.
    Type: Grant
    Filed: April 11, 1997
    Date of Patent: June 12, 2001
    Assignee: Yamaichi Electronics Co., Ltd.
    Inventors: Etsuji Suzuki, Akira Yonezawa, Hidehisa Yamazaki
  • Patent number: 5973395
    Abstract: An IC package is provided that has a flexible wiring sheet, including an upper portion, a lower portion and a side portion which is wound around a base member over an upper surface, side surfaces and a lower surface of the base member. An IC is loaded on an upper surface of the upper flexible wiring sheet covering the upper surface of the base member. The IC is connected to an electrode provided on an upper lead pattern portion laid along the upper surface of the flexible wiring sheet. The lead pattern is extended from the upper flexible wiring sheet to the lower flexible wiring sheet via the side surfaces of the flexible wiring sheet covering side surfaces of the base member. An electrode to be connected with an object is arranged on the lower lead pattern portion which is formed on the lower flexible wiring sheet, and overall the IC or an IC connection portion is sealed on the upper surface of the upper flexible wiring sheet.
    Type: Grant
    Filed: April 29, 1997
    Date of Patent: October 26, 1999
    Assignee: Yamaichi Electronics Co., Ltd.
    Inventors: Etsuji Suzuki, Akira Yonezawa, Hidehisa Yamazaki, Hiroshi Odaira
  • Patent number: 5950306
    Abstract: A circuit board includes a wiring board which includes an insulative board having a wiring pattern on one surface thereof, a connection hole being formed in the insulative board such that the connection hole reaches the wiring pattern, a conductive bump, which is formed by growing a plating on the wiring pattern, being embedded in the connection hole, and the conductive bump serves as a connection to a wiring pattern which is intimately attached to the other surface of the insulative board.
    Type: Grant
    Filed: December 11, 1996
    Date of Patent: September 14, 1999
    Assignee: Yamaichi Electronics Co., Ltd.
    Inventors: Etsuji Suzuki, Akira Yonezawa, Hidehisa Yamazaki