Abstract: There is provided an improved system wherein a storage capacity for storing membership functions is reduced. In the system, a plurality of sections T11 through T16 are set having boundaries at vertexes or tops where the respective grades of a plurality of membership functions MF11 through MF17 become the maxim values. In each section, a pair of adjacent membership functions are set to be in an overlapping relationship and symmetrical with respect to a center of the section about their shapes. Coordinates X11 through X17 of the respective vertexes and gradient data g11 through g16 providing shapes of membership functions in the respective sections are set as the data providing the plurality of membership functions.

Abstract: The knowledge of an expert user expressing the relationships between phenomena and a conclusion (a rule) is stored prior to the use of the device. Input data are applied to this knowledge in order to make an inference. The possibility of the conclusion is calculated, and the clearness of each phenomenon relative to the possibility of each conclusion is determined by the fuzzy inference device. The phenomena related to a single conclusion which have low static information amount or clearness are selectively eliminated. In this way the rule can be adjusted, the processing time can be reduced, and the reliability of the conclusion can be improved. In second and third embodiments of the invention, the knowledge of an expert user expressing the relationships between phenomena and conclusions (rules) is stored prior to the use of the device. Inferences are made by applying input data to this knowledge.

Abstract: The invention relates to a signal processor to be built into a controller or the like for receiving various input signals and generating control signals according to the input signals. The signal processor includes an internal bus interconnecting various components of the signal processor. The invention also includes a first input-output controller for controlling the application of input signals to the signal processor and the output of control signals from the signal processor. The first input-output controller operates under the control of a switch in which the switching criteria for the switch is whether or not the signal processor is using its internal bus. Accordingly, the first input-output controller is allowed access to the signal processor depending on whether or not the internal bus of the signal processor is being used.