Patents by Inventor Hideki Fukumoto

Hideki Fukumoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11971633
    Abstract: An electrode structure includes: a plurality of pixel electrodes arranged separately from each other; and a plurality of dielectric layers laminated in a first direction with respect to the plurality of pixel electrodes, in which the plurality of dielectric layers includes: a first dielectric layer that spreads over the plurality of pixel electrodes in a direction intersecting with the first direction; and a second dielectric layer that includes dielectric material having a refractive index higher than that of the first dielectric layer, sandwiches the first dielectric layer together with the plurality of pixel electrodes, and has a slit at a position overlapping space between pixel electrodes adjacent when viewed from the first direction.
    Type: Grant
    Filed: May 15, 2020
    Date of Patent: April 30, 2024
    Assignees: SONY SEMICONDUCTOR SOLUTIONS CORPORATION, SONY GROUP CORPORATION
    Inventors: Takashi Sakairi, Tomoaki Honda, Tsuyoshi Okazaki, Keiichi Maeda, Chiho Araki, Katsunori Dai, Shunsuke Narui, Kunihiko Hikichi, Kouta Fukumoto, Toshiaki Okada, Takuma Matsuno, Yuu Kawaguchi, Yuuji Adachi, Koichi Amari, Hideki Kawaguchi, Seiya Haraguchi, Takayoshi Masaki, Takuya Fujino, Tadayuki Dofuku, Yosuke Takita, Kazuhiro Tamura, Atsushi Tanaka
  • Patent number: 11482441
    Abstract: A method for manufacturing a semiconductor device includes at least the following three steps: (A) A step of preparing a structure including a semiconductor wafer having a circuit-formed surface and an adhesive film attached to the circuit-formed surface side of the semiconductor wafer; (B) A step of back grinding a surface on a side opposite to the circuit-formed surface side of the semiconductor wafer; and (C) A step of radiating ultraviolet rays to the adhesive film and then removing the adhesive film from the semiconductor wafer. The adhesive film includes a base material layer and an ultraviolet-curable adhesive resin layer provided on one surface side thereof. The adhesive resin layer includes an ultraviolet-curable adhesive resin, and a saturated electrostatic potential V1 of a surface of the adhesive resin layer after ultraviolet curing, which is measured using a specific method, is equal to or less than 2.0 kV.
    Type: Grant
    Filed: March 21, 2017
    Date of Patent: October 25, 2022
    Assignee: MITSUI CHEMICALS TOHCELLO, INC.
    Inventors: Hiroyoshi Kurihara, Hideki Fukumoto
  • Publication number: 20190088528
    Abstract: A method for manufacturing a semiconductor device includes at least the following three steps: (A) A step of preparing a structure including a semiconductor wafer having a circuit-formed surface and an adhesive film attached to the circuit-formed surface side of the semiconductor wafer; (B) A step of back grinding a surface on a side opposite to the circuit-formed surface side of the semiconductor wafer; and (C) A step of radiating ultraviolet rays to the adhesive film and then removing the adhesive film from the semiconductor wafer. The adhesive film includes a base material layer and an ultraviolet-curable adhesive resin layer provided on one surface side thereof. The adhesive resin layer includes an ultraviolet-curable adhesive resin, and a saturated electrostatic potential V1 of a surface of the adhesive resin layer after ultraviolet curing, which is measured using a specific method, is equal to or less than 2.0 kV.
    Type: Application
    Filed: March 21, 2017
    Publication date: March 21, 2019
    Applicant: MITSUI CHEMICALS TOHCELLO, INC.
    Inventors: Hiroyoshi KURIHARA, Hideki FUKUMOTO
  • Patent number: 10150489
    Abstract: A tubular elastic linkage device for axle beam for elastically linking a truck frame and an axle beam including: an inner axial member; two outer segments opposed in axis-perpendicular direction peripherally outside the inner axial member for attachment to a housing part on an axle-beam side; and a main rubber elastic body elastically connecting them. A pocket part opens in an outer peripheral face of the main rubber elastic body onto outside via a window penetrating one outer segment. A stopper supported by the inner axial member is disposed in the pocket part to face the housing part distantly via the window. Contact of the stopper with the housing part constitutes a displacement limitation mechanism between the inner axial member and the outer segments. The other outer segment has an aperture having the main rubber elastic body exposed outside via it.
    Type: Grant
    Filed: August 29, 2017
    Date of Patent: December 11, 2018
    Assignees: SUMITOMO RIKO COMPANY LIMITED, KAWASAKI JUKOGYO KABUSHIKI KAISHA
    Inventors: Shigehiro Otsubo, Yusuke Ito, Hideki Fukumoto, Yoshinori Mitsuze, Hiroyuki Fujii, Jun Shirasaki
  • Patent number: 9966297
    Abstract: According to the present invention, there is provided a semiconductor wafer protective film including a substrate layer (A) and an adhesive layer (C) formed on the substrate layer (A), in which the substrate layer (A) includes polymer, and a solubility parameter of the polymer determined by a Van Krevelen method is equal to or greater than 9.
    Type: Grant
    Filed: May 22, 2014
    Date of Patent: May 8, 2018
    Assignee: MITSUI CHEMICALS TOHCELLO, INC.
    Inventors: Akimitsu Morimoto, Makoto Kataoka, Hideki Fukumoto
  • Publication number: 20170355387
    Abstract: A tubular elastic linkage device for axle beam for elastically linking a truck frame and an axle beam including: an inner axial member; two outer segments opposed in axis-perpendicular direction peripherally outside the inner axial member for attachment to a housing part on an axle-beam side; and a main rubber elastic body elastically connecting them. A pocket part opens in an outer peripheral face of the main rubber elastic body onto outside via a window penetrating one outer segment. A stopper supported by the inner axial member is disposed in the pocket part to face the housing part distantly via the window. Contact of the stopper with the housing part constitutes a displacement limitation mechanism between the inner axial member and the outer segments. The other outer segment has an aperture having the main rubber elastic body exposed outside via it.
    Type: Application
    Filed: August 29, 2017
    Publication date: December 14, 2017
    Applicants: Sumitomo Riko Company Limited, KAWASAKI JUKOGYO KABUSHIKI KAISHA
    Inventors: Shigehiro OTSUBO, Yusuke ITO, Hideki FUKUMOTO, Yoshinori MITSUZE, Hiroyuki FUJII, Jun SHIRASAKI
  • Patent number: 9583925
    Abstract: A gasket for an electrical junction box of a railcar is fitted in a groove portion formed on a contact surface of a side wall portion or a contact surface of a cover in the electrical junction box including: a box main body having the side wall portion defining an opening communicating with an outer space; and the cover closing the opening. Further, the gasket for the electrical junction box of the railcar includes: small width portions, a width of each of the small width portions being smaller than a width of the groove portion; and large width portions each having projections projecting toward both respective sides of the small width portion in a width direction and having a larger width than the width of the small width portions. The small width portions and the large width portions are alternately provided.
    Type: Grant
    Filed: December 7, 2015
    Date of Patent: February 28, 2017
    Assignee: KAWASAKI JUKOGYO KABUSHIKI KAISHA
    Inventors: Masahiro Hamada, Hideki Fukumoto, Teruaki Mizukawa, Masahiro Sakahira, Tomohiro Narita
  • Publication number: 20160197462
    Abstract: A gasket for an electrical junction box of a railcar is fitted in a groove portion formed on a contact surface of a side wall portion or a contact surface of a cover in the electrical junction box including: a box main body having the side wall portion defining an opening communicating with an outer space; and the cover closing the opening. Further, the gasket for the electrical junction box of the railcar includes: small width portions, a width of each of the small width portions being smaller than a width of the groove portion; and large width portions each having projections projecting toward both respective sides of the small width portion in a width direction and having a larger width than the width of the small width portions. The small width portions and the large width portions are alternately provided.
    Type: Application
    Filed: December 7, 2015
    Publication date: July 7, 2016
    Applicant: KAWASAKI JUKOGYO KABUSHIKI KAISHA
    Inventors: Masahiro HAMADA, Hideki FUKUMOTO, Teruaki MIZUKAWA, Masahiro SAKAHIRA, Tomohiro NARITA
  • Publication number: 20160133500
    Abstract: According to the present invention, there is provided a semiconductor wafer protective film including a substrate layer (A) and an adhesive layer (C) formed on the substrate layer (A), in which the substrate layer (A) includes polymer, and a solubility parameter of the polymer determined by a Van Krevelen method is equal to or greater than 9.
    Type: Application
    Filed: May 22, 2014
    Publication date: May 12, 2016
    Applicant: MITSUI CHEMICALS TOHCELLO, INC.
    Inventors: Akimitsu MORIMOTO, Makoto KATAOKA, Hideki FUKUMOTO
  • Patent number: 8893625
    Abstract: The present invention provides a rubber stopper that can set a shape suitable for mounting and set a desired stopper characteristic. Specifically, a holding fitting 3 fastened to one member by means of bolting is provided. A rubber section 4 that abuts against the other member is held by the holding fitting 3. The holding fitting 3 has a partition wall 8 to divide between a peripheral edge of a bolt hole 7 and a holding section 9 that holds the rubber section 4. A rubber side abutment surface 12 in the rubber section 4 protrudes from a top of the partition wall 8. A bored section 13 is formed near the partition wall 8 of the rubber section 4. The bored section 13 increases durability of the rubber section 4. A size of the rubber stopper 1 is reduced.
    Type: Grant
    Filed: August 18, 2011
    Date of Patent: November 25, 2014
    Assignees: Toyo Tire & Rubber Co., Ltd., Kawasaki Heavy Industries, Ltd.
    Inventors: Kazuma Higashi, Hideki Fukumoto, Masahiro Hamada, Masahiro Sakahira
  • Patent number: 7501312
    Abstract: A protecting method for a semiconductor wafer in a step of processing a semiconductor wafer which involves a first step of adhering an adhesive film for protection of a semiconductor wafer in which an adhesive layer is formed on one surface of a base film to a circuit-formed surface of the semiconductor wafer, a second step of heating the semiconductor wafer to which the adhesive film for protection of the semiconductor wafer is adhered, a third step of processing a non-circuit-formed surface of the semiconductor wafer by fixing the semiconductor wafer to which the adhesive film for protection of the semiconductor wafer is adhered on a grinding machine or an abrasive machine, and a fourth step of peeling the adhesive film for protection of the semiconductor wafer from the semiconductor wafer. The method addresses warpage problems and can prevent breakage of wafers during conveyance even if the thickness of a wafer is reduced to approximately 150 ?m or less.
    Type: Grant
    Filed: January 27, 2005
    Date of Patent: March 10, 2009
    Assignee: Mitsui Chemicals, Inc.
    Inventors: Takanobu Koshimizu, Makoto Kataoka, Masafumi Miyakawa, Hideki Fukumoto, Yoshihisa Saimoto
  • Publication number: 20050164509
    Abstract: The present invention is to provide a protecting method for a semiconductor wafer and an adhesive film for protection of a semiconductor wafer which makes it possible to straighten or avoid warpage in a semiconductor wafer and to prevent breakage of wafers during conveyance of wafers even if the thickness of a semiconductor wafer is thinned to approximately 150 ?m or less.
    Type: Application
    Filed: January 27, 2005
    Publication date: July 28, 2005
    Applicant: Mitsui Chemicals, Inc.
    Inventors: Takanobu Koshimizu, Makoto Kataoka, Masafumi Miyakawa, Hideki Fukumoto, Yoshihisa Saimoto
  • Patent number: 6879026
    Abstract: An adhesive film for protecting the surface of a semiconductor wafer wherein the adhesive layer is formed on one surface of a substrate film, the substrate film comprising at least one layer which satisfies the following requisites (A) and at least one of (B) or (C): requisite (A): high elastic modulus properties in which the storage modulus is 1×109 Pa to 1×1010 Pa under the total temperature range of from 18 to 50° C. requisite (B): high elastic modulus properties in which the storage modulus within at least part of the temperature range of from 50 to 90° C. is not more than 1×108 Pa. requisite (C): high elastic modulus properties with expansibility by water absorption in which the size-changing ratio by absorbing water for four hours is 0.05 to 0.5% at 23° C. and 90% RH.
    Type: Grant
    Filed: January 10, 2003
    Date of Patent: April 12, 2005
    Assignee: Mitsui Chemicals, Inc.
    Inventors: Hideki Fukumoto, Takanobu Koshimizu, Makoto Kataoka, Yoshihisa Saimoto
  • Patent number: 6730595
    Abstract: This invention aims to provide a protecting method for a semiconductor wafer which can prevent breakage of a semiconductor wafer even when a semiconductor wafer is thinned to a thickness of 200 &mgr;m or less, and a surface protecting adhesive film for a semiconductor wafer used in the protecting method.
    Type: Grant
    Filed: December 6, 2001
    Date of Patent: May 4, 2004
    Assignee: Mitsui Chemicals, Inc.
    Inventors: Yoshihisa Saimoto, Yasuhisa Fujii, Makoto Kataoka, Kentaro Hirai, Hideki Fukumoto, Takanobu Koshimizu
  • Publication number: 20030219960
    Abstract: An adhesive film for protecting the surface of a semiconductor wafer wherein the adhesive layer is formed on one surface of a substrate film, the substrate film comprising at least one layer which satisfies the following requisites (A) and at least one of (B) or (C):
    Type: Application
    Filed: January 10, 2003
    Publication date: November 27, 2003
    Applicant: Mitsui Chemicals, Inc.
    Inventors: Hideki Fukumoto, Takanobu Koshimizu, Makoto Kataoka, Yoshihisa Saimoto
  • Publication number: 20020106868
    Abstract: This invention aims to provide a protecting method for a semiconductor wafer which can prevent breakage of a semiconductor wafer even when a semiconductor wafer is thinned to a thickness of 200 &mgr;m or less, and a surface protecting adhesive film for a semiconductor wafer used in the protecting method.
    Type: Application
    Filed: December 6, 2001
    Publication date: August 8, 2002
    Inventors: Yoshihisa Saimoto, Yasuhisa Fujii, Makoto Kataoka, Kentaro Hirai, Hideki Fukumoto, Takanobu Koshimizu
  • Patent number: 6273791
    Abstract: A method of producing a semiconductor wafer, which can prevent the breakage of a wafer, and also can reduce the working time in a series of operations attended by back surface grinding of the semiconductor wafer. The method involves producing a semiconductor wafer wherein an adhesive tape is applied on the surface of the semiconductor wafer and, after grinding the back surface of the semiconductor wafer using a grinding machine, the adhesive tape is peeled off, said process comprises using an adhesive tape having heat shrinkability as the adhesive tape, grinding the back surface of the semiconductor wafer and heating the adhesive tape in the grinding machine, thereby peeling off the adhesive tape from the surface of the semiconductor wafer.
    Type: Grant
    Filed: June 14, 1999
    Date of Patent: August 14, 2001
    Assignee: Mitsui Chemicals, Inc.
    Inventors: Makoto Kataoka, Yasuhisa Fujii, Kentaro Hirai, Hideki Fukumoto
  • Patent number: 6159827
    Abstract: An object of the invention is to provide a preparation process of a semiconductor wafer, in which breakage of the wafer on grinding the back surface of the wafer and on peeling the adhesive tape is prevented, and the operation time can be reduced. The preparation process of a semiconductor wafer comprises the steps of: adhering an adhesive tape on a front surface of a semiconductor wafer; grinding a back surface of the semiconductor wafer by a grinding machine; peeling the adhesive tape; and cleaning the front surface of the semiconductor wafer, wherein an adhesive tape having heat shrinkability is used as the adhesive tape, and after grinding the back surface of the semiconductor wafer, warm water at a temperature of from 50 to 99.degree. C. is poured to peel the adhesive tape in a wafer cleaning machine, and the front surface of the semiconductor wafer is cleaned in the wafer cleaning machine.
    Type: Grant
    Filed: April 5, 1999
    Date of Patent: December 12, 2000
    Assignee: Mitsui Chemicals, Inc.
    Inventors: Makoto Kataoka, Yasuhisa Fujii, Kentaro Hirai, Hideki Fukumoto, Masatoshi Kumagai