Patents by Inventor Hideki Harano

Hideki Harano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9972591
    Abstract: To improve reliability of a semiconductor device, in a method of manufacturing the semiconductor device, a semiconductor substrate having an insulating film in which an opening that exposes each of a plurality of electrode pads is formed is provided, and a flux member including conductive particles is arranged over each of the electrode pads. Thereafter, a solder ball is arranged over each of the electrode pads via the flux member, and is then heated via the flux member so that the solder ball is bonded to each of the electrode pads. The width of the opening of the insulating film is smaller than the width (diameter) of the solder ball.
    Type: Grant
    Filed: January 30, 2017
    Date of Patent: May 15, 2018
    Assignee: Renesas Electronics Corporation
    Inventor: Hideki Harano
  • Publication number: 20170287859
    Abstract: To improve reliability of a semiconductor device, in a method of manufacturing the semiconductor device, a semiconductor substrate having an insulating film in which an opening that exposes each of a plurality of electrode pads is formed is provided, and a flux member including conductive particles is arranged over each of the electrode pads. Thereafter, a solder ball is arranged over each of the electrode pads via the flux member, and is then heated via the flux member so that the solder ball is bonded to each of the electrode pads. The width of the opening of the insulating film is smaller than the width (diameter) of the solder ball.
    Type: Application
    Filed: January 30, 2017
    Publication date: October 5, 2017
    Inventor: Hideki HARANO
  • Patent number: 9536849
    Abstract: A semiconductor device includes a semiconductor substrate, a pad electrode formed on the semiconductor substrate, a post electrode formed on the pad electrode and made of a copper film, a solder ball electrode formed on the post electrode and made of ternary alloy containing tin, a terminal connected to the solder ball electrode and formed on a front surface of a wiring board, and a sealing material filling a gap between the semiconductor substrate and the wiring board. The post electrode includes a cylindrical stem portion and an overhanging portion positioned in an upper part of the stem portion and protruding to an outer side of the stem portion, the solder ball electrode is connected to an upper surface of the post electrode over the stem portion and the overhanging portion, and a sidewall of the stem portion contacts with the sealing material over the entire circumference thereof.
    Type: Grant
    Filed: April 12, 2016
    Date of Patent: January 3, 2017
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Akira Yajima, Hideki Harano, Katsuhiro Torii, Hironori Ochi
  • Publication number: 20160322321
    Abstract: A semiconductor device includes a semiconductor substrate, a pad electrode formed on the semiconductor substrate, a post electrode formed on the pad electrode and made of a copper film, a solder ball electrode formed on the post electrode and made of ternary alloy containing tin, a terminal connected to the solder ball electrode and formed on a front surface of a wiring board, and a sealing material filling a gap between the semiconductor substrate and the wiring board. The post electrode includes a cylindrical stem portion and an overhanging portion positioned in an upper part of the stem portion and protruding to an outer side of the stem portion, the solder ball electrode is connected to an upper surface of the post electrode over the stem portion and the overhanging portion, and a sidewall of the stem portion contacts with the sealing material over the entire circumference thereof.
    Type: Application
    Filed: April 12, 2016
    Publication date: November 3, 2016
    Inventors: Akira YAJIMA, Hideki HARANO, Katsuhiro TORII, Hironori OCHI
  • Patent number: 6843069
    Abstract: An etching apparatus of the present invention has a processing device having a reaction chamber in which an electrode provided with a built-in refrigerant-circulating path is installed, a refrigerator for cooling the refrigerant at a predetermined temperature and circulating the refrigerant in the refrigerant-circulating path at a predetermined flow rate, a controlling device for controlling the temperature or flow rate of the refrigerant, a status monitor for monitoring an operational status, and a temperature control device for controlling the temperature of the electrode by controlling the temperature or flow rate of the refrigerant on the basis of information about the operational status.
    Type: Grant
    Filed: January 2, 2003
    Date of Patent: January 18, 2005
    Assignee: NEC Electronics Corporation
    Inventors: Hideki Harano, Hirofumi Seo
  • Publication number: 20030126872
    Abstract: An etching apparatus of the present invention has a processing device having a reaction chamber in which an electrode provided with a built-in refrigerant-circulating path is installed, a refrigerator for cooling the refrigerant at a predetermined temperature and circulating the refrigerant in the refrigerant-circulating path at a predetermined flow rate, a controlling device for controlling the temperature or flow rate of the refrigerant, a status monitor for monitoring an operational status, and a temperature control device for controlling the temperature of the electrode by controlling the temperature or flow rate of the refrigerant on the basis of information about the operational status.
    Type: Application
    Filed: January 2, 2003
    Publication date: July 10, 2003
    Applicant: NEC ELECTRONICS CORPORATION
    Inventors: Hideki Harano, Hirofumi Seo
  • Patent number: 6475334
    Abstract: An inductively coupled plasma dry etching device includes etching chamber 10 and ceramic dome 20. Etching chamber 10 is provided with gate 11 and gas injection port 12. Ceramic ESC stage 31 is provided inside etching chamber 10, and outside etching chamber 10, pressure gauge 13 and pressure controller 40 are connected, and high-frequency power supply 23 is connected to ESC stage 31. First coil 21 and second coil 22 are arranged in helical form on the outside of dome 20 such that turns of one coil lie between turns of the other coil, first coil 21 being connected to second high-frequency power supply 24 and second coil 22 being connected to third high-frequency power supply 25. The high-frequency power supplies are switched at a prescribed time interval.
    Type: Grant
    Filed: July 6, 2000
    Date of Patent: November 5, 2002
    Assignee: NEC Corporation
    Inventor: Hideki Harano