Patents by Inventor Hideki Higashitani
Hideki Higashitani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20130168148Abstract: A multilayer wiring board includes a double-sided wiring board, an insulating substrate stacked on the double-sided wiring board, vias provided in through-holes in the insulating substrate, an outermost wiring on an upper surface of the insulating substrate, a first fiducial mark provided on the double-sided wiring board, and a second fiducial mark provided on the insulating substrate. The first fiducial mark contains a wiring of the double-sided wiring board. The second fiducial mark contains at least one via out of the vias. The first and second fiducial marks are provided for positioning the double-sided wiring board and the insulating substrate to each other. This multilayer wiring board includes layers positioned precisely.Type: ApplicationFiled: November 24, 2011Publication date: July 4, 2013Inventors: Toshinobu Kanai, Ryuichi Saito, Hideki Higashitani
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Publication number: 20130062101Abstract: A multilayer wiring board includes inner-layer wiring boards each having wirings on both sides thereof; electrically insulating substrates each having through-holes filled with a conductive paste; and wirings formed in the outermost layers. The wiring boards and the electrically insulating substrates are stacked alternately in such a manner that the wirings of the wiring boards are embedded in the electrically insulating substrates at both ends of the conductive paste.Type: ApplicationFiled: June 2, 2011Publication date: March 14, 2013Applicant: PANASONIC CORPORATIONInventors: Toshinobu Kanai, Ryuichi Saito, Hideki Higashitani
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Patent number: 8071881Abstract: A wiring board which includes a product portion configured with at least one layer of electrically insulating base, a wiring pattern formed on the surface or inner portion of the electrically insulating base, and a wiring protection layer which is formed on the surface of the board and has an opening. Warping over the entire wiring board can be reduced since this wiring board has a warp-correcting portion warped in a direction different from that of the product portion.Type: GrantFiled: November 17, 2005Date of Patent: December 6, 2011Assignee: Panasonic CorporationInventor: Hideki Higashitani
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Patent number: 7968803Abstract: A wiring substrate of the invention comprises an electrical insulation substrate (1), a through-hole (3) formed in the electrical insulation substrate, electrically conductive paste (4) filled inside the through-hole, and wiring traces (11) formed on one or both surfaces of the electrical insulation substrate and electrically connected with the electrically conductive paste, wherein interfaces of the wiring traces in contact with the electrically conductive paste have at least one of an asperate surface and a smooth surface, and a plurality of granular bumps (14) formed further thereon.Type: GrantFiled: July 7, 2006Date of Patent: June 28, 2011Assignee: Panasonic CorporationInventor: Hideki Higashitani
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Publication number: 20100224395Abstract: A multilayer wiring board includes a first wiring and a second wiring which are provided on both surfaces of an insulating board, a conductor passing through the insulating board for electrically connecting the first wiring to the second wiring, and an anchoring conductor passing through the insulating board. The anchoring conductor suppresses a distortion in the insulating board along the shearing direction of the insulating board and a deforming of the conductor, thus providing the multilayer wiring board with preferable electrical connection.Type: ApplicationFiled: March 27, 2007Publication date: September 9, 2010Applicant: PANASONIC CORPORATIONInventor: Hideki Higashitani
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Publication number: 20100032202Abstract: A wiring substrate of the invention comprises electrical insulation substrate (1), through-hole (3) formed in the electrical insulation substrate, electrically conductive paste (4) filled inside the through-hole, and wiring traces (11) formed on one or both surfaces of the electrical insulation substrate and electrically connected with the electrically conductive paste, wherein interfaces of the wiring traces in contact with the electrically conductive paste have at least one of an asperate surface and a smooth surface, and a plurality of granular bumps (14) formed further thereon.Type: ApplicationFiled: July 7, 2006Publication date: February 11, 2010Inventor: Hideki Higashitani
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Publication number: 20090133915Abstract: A wiring board which includes a product portion configured with at least one layer of electrically insulating base, a wiring pattern formed on the surface or inner portion of the electrically insulating base, and a wiring protection layer which is formed on the surface of the board and has an opening. Warping over the entire wiring board can be reduced since this wiring board has a warp-correcting portion warped in a direction different from that of the product portion.Type: ApplicationFiled: November 17, 2005Publication date: May 28, 2009Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventor: Hideki Higashitani
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Patent number: 7291915Abstract: A circuit board includes an insulating substrate, a first conductive layer on the insulating substrate, a second conductive layer on the first conductive layer, and a third conductive layer covering the first conductive layer and the second conductive layer. The first conductive layer has a surface provided on the surface of the insulating substrate, and a surface having a width smaller than a width of the above surface. In this circuit board, the conductive layers have small impedances even if a high-frequency signal flows in the conductive layers.Type: GrantFiled: August 15, 2005Date of Patent: November 6, 2007Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Toshio Sugawa, Hideki Higashitani, Takumi Misaki
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Patent number: 7252891Abstract: A wiring transfer sheet including a carrier base and a wiring layer formed thereon is produced so that an exposed area of a surface of the carrier base on which the wiring layer is formed has a plurality of concavities. By transferring the wiring layer to an electrically insulating substrate with this wiring transfer sheet, convexities which are complementary to the concavities are formed on the electrically insulating substrate. The convexities improve adhesion between a wiring board and a resin stacked thereon. Therefore, the wiring board thus obtained has surface coplanarity suitable for mounting a semiconductor bare chip and an electronic component as a whole, and a microscopical surface structure which adheres to a material stacked thereon.Type: GrantFiled: January 16, 2004Date of Patent: August 7, 2007Assignee: Matsushita Electric Industrial Co., Ltd.Inventor: Hideki Higashitani
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Patent number: 7247508Abstract: A semiconductor element and a circuit substrate each having electrodes disposed at narrow pitch are electrically connected with high reliability by conductive paste. A semiconductor device with a semiconductor section and a circuit substrate electrically connected and a method for manufacturing such semiconductor device are provided. The manufacturing method includes processes of: forming semiconductor electrodes at the semiconductor section; forming substrate electrodes at the circuit substrate; firstly affixing one part of the semiconductor section and circuit substrate to an intermediate connector made of insulating material; forming via holes at intermediate connector according to positions of the semiconductor electrodes and positions of the substrate electrodes; electrically connecting each semiconductor electrode and each substrate electrode via each via hole; and secondly affixing the other part of the semiconductor section and circuit substrate to the intermediate connector.Type: GrantFiled: February 23, 2005Date of Patent: July 24, 2007Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Hideki Higashitani, Tadashi Nakamura, Daizo Andoh
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Patent number: 7200927Abstract: A wiring transfer sheet including a carrier base and a wiring layer formed thereon is produced so that an exposed area of a surface of the carrier base on which the wiring layer is formed has a plurality of concavities. By transferring the wiring layer to an electrically insulating substrate with this wiring transfer sheet, convexities which are complementary to the concavities are formed on the electrically insulating substrate. The convexities improve adhesion between a wiring board and a resin stacked thereon. Therefore, the wiring board thus obtained has surface coplanarity suitable for mounting a semiconductor bare chip and an electronic component as a whole, and a microscopical surface structure which adheres to a material stacked thereon.Type: GrantFiled: January 16, 2004Date of Patent: April 10, 2007Assignee: Matsushita Electric Industrial Co., Ltd.Inventor: Hideki Higashitani
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Patent number: 7132029Abstract: It is an object of the present invention to provide a multilayer circuit board, and a method for manufacturing the same, in which a plurality of circuit boards are layered, wherein as regards at least one circuit board positioned on an outer side, a conductive substance is filled into holes passing through the circuit board in the thickness direction and cured, and the wiring layers of the plurality of circuit boards are electrically connected by the conductive substance that has been cured, wherein in the multilayer circuit board, the wiring layer positioned outside the conductive substance that has been cured projects outward from its surroundings. Thus, the conductive paste is sufficiently compressed during hot pressing to yield a stable electrical connection, and thermosetting resin can be filled in between the inner layer wiring pattern without leaving gaps.Type: GrantFiled: September 14, 2005Date of Patent: November 7, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yasuhiro Nakatani, Hideki Higashitani, Tadashi Nakamura, Fumio Echigo
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Patent number: 7018705Abstract: It is an object of the present invention to provide a multilayer circuit board, and a method for manufacturing the same, in which a plurality of circuit boards are layered, wherein as regards at least one circuit board positioned on an outer side, a conductive substance is filled into holes passing through the circuit board in the thickness direction and cured, and the wiring layers of the plurality of circuit boards are electrically connected by the conductive substance that has been cured, wherein in the multilayer circuit board, the wiring layer positioned outside the conductive substance that has been cured projects outward from its surroundings. Thus, the conductive paste is sufficiently compressed during hot pressing to yield a stable electrical connection, and thermosetting resin can be filled in between the inner layer wiring pattern without leaving gaps.Type: GrantFiled: May 10, 2004Date of Patent: March 28, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yasuhiro Nakatani, Hideki Higashitani, Tadashi Nakamura, Fumio Echigo
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Publication number: 20060054350Abstract: A circuit board includes an insulating substrate, a first conductive layer on the insulating substrate, a second conductive layer on the first conductive layer, and a third conductive layer covering the first conductive layer and the second conductive layer. The first conductive layer has a surface provided on the surface of the insulating substrate, and a surface having a width smaller than a width of the above surface. In this circuit board, the conductive layers have small impedances even if a high-frequency signal flows in the conductive layers.Type: ApplicationFiled: August 15, 2005Publication date: March 16, 2006Inventors: Toshio Sugawa, Hideki Higashitani, Takumi Misaki
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Publication number: 20060008628Abstract: It is an object of the present invention to provide a multilayer circuit board, and a method for manufacturing the same, in which a plurality of circuit boards are layered, wherein as regards at least one circuit board positioned on an outer side, a conductive substance is filled into holes passing through the circuit board in the thickness direction and cured, and the wiring layers of the plurality of circuit boards are electrically connected by the conductive substance that has been cured, wherein in the multilayer circuit board, the wiring layer positioned outside the conductive substance that has been cured projects outward from its surroundings. Thus, the conductive paste is sufficiently compressed during hot pressing to yield a stable electrical connection, and thermosetting resin can be filled in between the inner layer wiring pattern without leaving gaps.Type: ApplicationFiled: September 14, 2005Publication date: January 12, 2006Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Yasuhiro Nakatani, Hideki Higashitani, Tadashi Nakamura, Fumio Echigo
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Patent number: 6946205Abstract: A wiring transfer sheet including a carrier base and a wiring layer formed thereon is produced so that an exposed area of a surface of the carrier base on which the wiring layer is formed has a plurality of concavities. By transferring the wiring layer to an electrically insulating substrate with this wiring transfer sheet, convexities which are complementary to the concavities are formed on the electrically insulating substrate. The convexities improve adhesion between a wiring board and a resin stacked thereon. Therefore, the wiring board thus obtained has surface coplanarity suitable for mounting a semiconductor bare chip and an electronic component as a whole, and a microscopical surface structure which adheres to a material stacked thereon.Type: GrantFiled: April 23, 2003Date of Patent: September 20, 2005Assignee: Matsushita Electric Industrial Co., Ltd.Inventor: Hideki Higashitani
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Patent number: 6926789Abstract: A wiring transfer sheet including a carrier base and a wiring layer formed thereon is produced so that an exposed area of a surface of the carrier base on which the wiring layer is formed has a plurality of concavities. By transferring the wiring layer to an electrically insulating substrate with this wiring transfer sheet, convexities which are complementary to the concavities are formed on the electrically insulating substrate. The convexities improve adhesion between a wiring board and a resin stacked thereon. Therefore, the wiring board thus obtained has surface coplanarity suitable for mounting a semiconductor bare chip and an electronic component as a whole, and a microscopical surface structure which adheres to a material stacked thereon.Type: GrantFiled: January 16, 2004Date of Patent: August 9, 2005Assignee: Matsushita Electric Industrial Co., Ltd.Inventor: Hideki Higashitani
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Publication number: 20050142693Abstract: A semiconductor element and a circuit substrate each having electrodes disposed at narrow pitch are electrically connected with high reliability by conductive paste. A semiconductor device with a semiconductor section and a circuit substrate electrically connected and a method for manufacturing such semiconductor device are provided. The manufacturing method includes processes of: forming semiconductor electrodes at the semiconductor section; forming substrate electrodes at the circuit substrate; firstly affixing one part of the semiconductor section and circuit substrate to an intermediate connector made of insulating material; forming via holes at intermediate connector according to positions of the semiconductor electrodes and positions of the substrate electrodes; electrically connecting each semiconductor electrode and each substrate electrode via each via hole; and secondly affixing the other part of the semiconductor section and circuit substrate to the intermediate connector.Type: ApplicationFiled: February 23, 2005Publication date: June 30, 2005Inventors: Hideki Higashitani, Tadashi Nakamura, Daizo Andoh
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Publication number: 20040231151Abstract: It is an object of the present invention to provide a multilayer circuit board, and a method for manufacturing the same, in which a plurality of circuit boards are layered, wherein as regards at least one circuit board positioned on an outer side, a conductive substance is filled into holes passing through the circuit board in the thickness direction and cured, and the wiring layers of the plurality of circuit boards are electrically connected by the conductive substance that has been cured, wherein in the multilayer circuit board, the wiring layer positioned outside the conductive substance that has been cured projects outward from its surroundings. Thus, the conductive paste is sufficiently compressed during hot pressing to yield a stable electrical connection, and thermosetting resin can be filled in between the inner layer wiring pattern without leaving gaps.Type: ApplicationFiled: May 10, 2004Publication date: November 25, 2004Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Yasuhiro Nakatani, Hideki Higashitani, Tadashi Nakamura, Fumio Echigo
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Publication number: 20040202781Abstract: A wiring transfer sheet including a carrier base and a wiring layer formed thereon is produced so that an exposed area of a surface of the carrier base on which the wiring layer is formed has a plurality of concavities. By transferring the wiring layer to an electrically insulating substrate with this wiring transfer sheet, convexities which are complementary to the concavities are formed on the electrically insulating substrate. The convexities improve adhesion between a wiring board and a resin stacked thereon. Therefore, the wiring board thus obtained has surface coplanarity suitable for mounting a semiconductor bare chip and an electronic component as a whole, and a microscopical surface structure which adheres to a material stacked thereon.Type: ApplicationFiled: January 16, 2004Publication date: October 14, 2004Inventor: Hideki Higashitani