Patents by Inventor Hideki Higashitani

Hideki Higashitani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130168148
    Abstract: A multilayer wiring board includes a double-sided wiring board, an insulating substrate stacked on the double-sided wiring board, vias provided in through-holes in the insulating substrate, an outermost wiring on an upper surface of the insulating substrate, a first fiducial mark provided on the double-sided wiring board, and a second fiducial mark provided on the insulating substrate. The first fiducial mark contains a wiring of the double-sided wiring board. The second fiducial mark contains at least one via out of the vias. The first and second fiducial marks are provided for positioning the double-sided wiring board and the insulating substrate to each other. This multilayer wiring board includes layers positioned precisely.
    Type: Application
    Filed: November 24, 2011
    Publication date: July 4, 2013
    Inventors: Toshinobu Kanai, Ryuichi Saito, Hideki Higashitani
  • Publication number: 20130062101
    Abstract: A multilayer wiring board includes inner-layer wiring boards each having wirings on both sides thereof; electrically insulating substrates each having through-holes filled with a conductive paste; and wirings formed in the outermost layers. The wiring boards and the electrically insulating substrates are stacked alternately in such a manner that the wirings of the wiring boards are embedded in the electrically insulating substrates at both ends of the conductive paste.
    Type: Application
    Filed: June 2, 2011
    Publication date: March 14, 2013
    Applicant: PANASONIC CORPORATION
    Inventors: Toshinobu Kanai, Ryuichi Saito, Hideki Higashitani
  • Patent number: 8071881
    Abstract: A wiring board which includes a product portion configured with at least one layer of electrically insulating base, a wiring pattern formed on the surface or inner portion of the electrically insulating base, and a wiring protection layer which is formed on the surface of the board and has an opening. Warping over the entire wiring board can be reduced since this wiring board has a warp-correcting portion warped in a direction different from that of the product portion.
    Type: Grant
    Filed: November 17, 2005
    Date of Patent: December 6, 2011
    Assignee: Panasonic Corporation
    Inventor: Hideki Higashitani
  • Patent number: 7968803
    Abstract: A wiring substrate of the invention comprises an electrical insulation substrate (1), a through-hole (3) formed in the electrical insulation substrate, electrically conductive paste (4) filled inside the through-hole, and wiring traces (11) formed on one or both surfaces of the electrical insulation substrate and electrically connected with the electrically conductive paste, wherein interfaces of the wiring traces in contact with the electrically conductive paste have at least one of an asperate surface and a smooth surface, and a plurality of granular bumps (14) formed further thereon.
    Type: Grant
    Filed: July 7, 2006
    Date of Patent: June 28, 2011
    Assignee: Panasonic Corporation
    Inventor: Hideki Higashitani
  • Publication number: 20100224395
    Abstract: A multilayer wiring board includes a first wiring and a second wiring which are provided on both surfaces of an insulating board, a conductor passing through the insulating board for electrically connecting the first wiring to the second wiring, and an anchoring conductor passing through the insulating board. The anchoring conductor suppresses a distortion in the insulating board along the shearing direction of the insulating board and a deforming of the conductor, thus providing the multilayer wiring board with preferable electrical connection.
    Type: Application
    Filed: March 27, 2007
    Publication date: September 9, 2010
    Applicant: PANASONIC CORPORATION
    Inventor: Hideki Higashitani
  • Publication number: 20100032202
    Abstract: A wiring substrate of the invention comprises electrical insulation substrate (1), through-hole (3) formed in the electrical insulation substrate, electrically conductive paste (4) filled inside the through-hole, and wiring traces (11) formed on one or both surfaces of the electrical insulation substrate and electrically connected with the electrically conductive paste, wherein interfaces of the wiring traces in contact with the electrically conductive paste have at least one of an asperate surface and a smooth surface, and a plurality of granular bumps (14) formed further thereon.
    Type: Application
    Filed: July 7, 2006
    Publication date: February 11, 2010
    Inventor: Hideki Higashitani
  • Publication number: 20090133915
    Abstract: A wiring board which includes a product portion configured with at least one layer of electrically insulating base, a wiring pattern formed on the surface or inner portion of the electrically insulating base, and a wiring protection layer which is formed on the surface of the board and has an opening. Warping over the entire wiring board can be reduced since this wiring board has a warp-correcting portion warped in a direction different from that of the product portion.
    Type: Application
    Filed: November 17, 2005
    Publication date: May 28, 2009
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventor: Hideki Higashitani
  • Patent number: 7291915
    Abstract: A circuit board includes an insulating substrate, a first conductive layer on the insulating substrate, a second conductive layer on the first conductive layer, and a third conductive layer covering the first conductive layer and the second conductive layer. The first conductive layer has a surface provided on the surface of the insulating substrate, and a surface having a width smaller than a width of the above surface. In this circuit board, the conductive layers have small impedances even if a high-frequency signal flows in the conductive layers.
    Type: Grant
    Filed: August 15, 2005
    Date of Patent: November 6, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshio Sugawa, Hideki Higashitani, Takumi Misaki
  • Patent number: 7252891
    Abstract: A wiring transfer sheet including a carrier base and a wiring layer formed thereon is produced so that an exposed area of a surface of the carrier base on which the wiring layer is formed has a plurality of concavities. By transferring the wiring layer to an electrically insulating substrate with this wiring transfer sheet, convexities which are complementary to the concavities are formed on the electrically insulating substrate. The convexities improve adhesion between a wiring board and a resin stacked thereon. Therefore, the wiring board thus obtained has surface coplanarity suitable for mounting a semiconductor bare chip and an electronic component as a whole, and a microscopical surface structure which adheres to a material stacked thereon.
    Type: Grant
    Filed: January 16, 2004
    Date of Patent: August 7, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Hideki Higashitani
  • Patent number: 7247508
    Abstract: A semiconductor element and a circuit substrate each having electrodes disposed at narrow pitch are electrically connected with high reliability by conductive paste. A semiconductor device with a semiconductor section and a circuit substrate electrically connected and a method for manufacturing such semiconductor device are provided. The manufacturing method includes processes of: forming semiconductor electrodes at the semiconductor section; forming substrate electrodes at the circuit substrate; firstly affixing one part of the semiconductor section and circuit substrate to an intermediate connector made of insulating material; forming via holes at intermediate connector according to positions of the semiconductor electrodes and positions of the substrate electrodes; electrically connecting each semiconductor electrode and each substrate electrode via each via hole; and secondly affixing the other part of the semiconductor section and circuit substrate to the intermediate connector.
    Type: Grant
    Filed: February 23, 2005
    Date of Patent: July 24, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hideki Higashitani, Tadashi Nakamura, Daizo Andoh
  • Patent number: 7200927
    Abstract: A wiring transfer sheet including a carrier base and a wiring layer formed thereon is produced so that an exposed area of a surface of the carrier base on which the wiring layer is formed has a plurality of concavities. By transferring the wiring layer to an electrically insulating substrate with this wiring transfer sheet, convexities which are complementary to the concavities are formed on the electrically insulating substrate. The convexities improve adhesion between a wiring board and a resin stacked thereon. Therefore, the wiring board thus obtained has surface coplanarity suitable for mounting a semiconductor bare chip and an electronic component as a whole, and a microscopical surface structure which adheres to a material stacked thereon.
    Type: Grant
    Filed: January 16, 2004
    Date of Patent: April 10, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Hideki Higashitani
  • Patent number: 7132029
    Abstract: It is an object of the present invention to provide a multilayer circuit board, and a method for manufacturing the same, in which a plurality of circuit boards are layered, wherein as regards at least one circuit board positioned on an outer side, a conductive substance is filled into holes passing through the circuit board in the thickness direction and cured, and the wiring layers of the plurality of circuit boards are electrically connected by the conductive substance that has been cured, wherein in the multilayer circuit board, the wiring layer positioned outside the conductive substance that has been cured projects outward from its surroundings. Thus, the conductive paste is sufficiently compressed during hot pressing to yield a stable electrical connection, and thermosetting resin can be filled in between the inner layer wiring pattern without leaving gaps.
    Type: Grant
    Filed: September 14, 2005
    Date of Patent: November 7, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yasuhiro Nakatani, Hideki Higashitani, Tadashi Nakamura, Fumio Echigo
  • Patent number: 7018705
    Abstract: It is an object of the present invention to provide a multilayer circuit board, and a method for manufacturing the same, in which a plurality of circuit boards are layered, wherein as regards at least one circuit board positioned on an outer side, a conductive substance is filled into holes passing through the circuit board in the thickness direction and cured, and the wiring layers of the plurality of circuit boards are electrically connected by the conductive substance that has been cured, wherein in the multilayer circuit board, the wiring layer positioned outside the conductive substance that has been cured projects outward from its surroundings. Thus, the conductive paste is sufficiently compressed during hot pressing to yield a stable electrical connection, and thermosetting resin can be filled in between the inner layer wiring pattern without leaving gaps.
    Type: Grant
    Filed: May 10, 2004
    Date of Patent: March 28, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yasuhiro Nakatani, Hideki Higashitani, Tadashi Nakamura, Fumio Echigo
  • Publication number: 20060054350
    Abstract: A circuit board includes an insulating substrate, a first conductive layer on the insulating substrate, a second conductive layer on the first conductive layer, and a third conductive layer covering the first conductive layer and the second conductive layer. The first conductive layer has a surface provided on the surface of the insulating substrate, and a surface having a width smaller than a width of the above surface. In this circuit board, the conductive layers have small impedances even if a high-frequency signal flows in the conductive layers.
    Type: Application
    Filed: August 15, 2005
    Publication date: March 16, 2006
    Inventors: Toshio Sugawa, Hideki Higashitani, Takumi Misaki
  • Publication number: 20060008628
    Abstract: It is an object of the present invention to provide a multilayer circuit board, and a method for manufacturing the same, in which a plurality of circuit boards are layered, wherein as regards at least one circuit board positioned on an outer side, a conductive substance is filled into holes passing through the circuit board in the thickness direction and cured, and the wiring layers of the plurality of circuit boards are electrically connected by the conductive substance that has been cured, wherein in the multilayer circuit board, the wiring layer positioned outside the conductive substance that has been cured projects outward from its surroundings. Thus, the conductive paste is sufficiently compressed during hot pressing to yield a stable electrical connection, and thermosetting resin can be filled in between the inner layer wiring pattern without leaving gaps.
    Type: Application
    Filed: September 14, 2005
    Publication date: January 12, 2006
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Yasuhiro Nakatani, Hideki Higashitani, Tadashi Nakamura, Fumio Echigo
  • Patent number: 6946205
    Abstract: A wiring transfer sheet including a carrier base and a wiring layer formed thereon is produced so that an exposed area of a surface of the carrier base on which the wiring layer is formed has a plurality of concavities. By transferring the wiring layer to an electrically insulating substrate with this wiring transfer sheet, convexities which are complementary to the concavities are formed on the electrically insulating substrate. The convexities improve adhesion between a wiring board and a resin stacked thereon. Therefore, the wiring board thus obtained has surface coplanarity suitable for mounting a semiconductor bare chip and an electronic component as a whole, and a microscopical surface structure which adheres to a material stacked thereon.
    Type: Grant
    Filed: April 23, 2003
    Date of Patent: September 20, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Hideki Higashitani
  • Patent number: 6926789
    Abstract: A wiring transfer sheet including a carrier base and a wiring layer formed thereon is produced so that an exposed area of a surface of the carrier base on which the wiring layer is formed has a plurality of concavities. By transferring the wiring layer to an electrically insulating substrate with this wiring transfer sheet, convexities which are complementary to the concavities are formed on the electrically insulating substrate. The convexities improve adhesion between a wiring board and a resin stacked thereon. Therefore, the wiring board thus obtained has surface coplanarity suitable for mounting a semiconductor bare chip and an electronic component as a whole, and a microscopical surface structure which adheres to a material stacked thereon.
    Type: Grant
    Filed: January 16, 2004
    Date of Patent: August 9, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Hideki Higashitani
  • Publication number: 20050142693
    Abstract: A semiconductor element and a circuit substrate each having electrodes disposed at narrow pitch are electrically connected with high reliability by conductive paste. A semiconductor device with a semiconductor section and a circuit substrate electrically connected and a method for manufacturing such semiconductor device are provided. The manufacturing method includes processes of: forming semiconductor electrodes at the semiconductor section; forming substrate electrodes at the circuit substrate; firstly affixing one part of the semiconductor section and circuit substrate to an intermediate connector made of insulating material; forming via holes at intermediate connector according to positions of the semiconductor electrodes and positions of the substrate electrodes; electrically connecting each semiconductor electrode and each substrate electrode via each via hole; and secondly affixing the other part of the semiconductor section and circuit substrate to the intermediate connector.
    Type: Application
    Filed: February 23, 2005
    Publication date: June 30, 2005
    Inventors: Hideki Higashitani, Tadashi Nakamura, Daizo Andoh
  • Publication number: 20040231151
    Abstract: It is an object of the present invention to provide a multilayer circuit board, and a method for manufacturing the same, in which a plurality of circuit boards are layered, wherein as regards at least one circuit board positioned on an outer side, a conductive substance is filled into holes passing through the circuit board in the thickness direction and cured, and the wiring layers of the plurality of circuit boards are electrically connected by the conductive substance that has been cured, wherein in the multilayer circuit board, the wiring layer positioned outside the conductive substance that has been cured projects outward from its surroundings. Thus, the conductive paste is sufficiently compressed during hot pressing to yield a stable electrical connection, and thermosetting resin can be filled in between the inner layer wiring pattern without leaving gaps.
    Type: Application
    Filed: May 10, 2004
    Publication date: November 25, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Yasuhiro Nakatani, Hideki Higashitani, Tadashi Nakamura, Fumio Echigo
  • Publication number: 20040202781
    Abstract: A wiring transfer sheet including a carrier base and a wiring layer formed thereon is produced so that an exposed area of a surface of the carrier base on which the wiring layer is formed has a plurality of concavities. By transferring the wiring layer to an electrically insulating substrate with this wiring transfer sheet, convexities which are complementary to the concavities are formed on the electrically insulating substrate. The convexities improve adhesion between a wiring board and a resin stacked thereon. Therefore, the wiring board thus obtained has surface coplanarity suitable for mounting a semiconductor bare chip and an electronic component as a whole, and a microscopical surface structure which adheres to a material stacked thereon.
    Type: Application
    Filed: January 16, 2004
    Publication date: October 14, 2004
    Inventor: Hideki Higashitani