Patents by Inventor Hideki Horii

Hideki Horii has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7638787
    Abstract: A phase changeable memory cell array region includes a lower interlayer insulating layer disposed on a semiconductor substrate. The region also includes a plurality of conductive plugs disposed through the lower interlayer insulating layer. The region also includes a phase changeable material pattern operably disposed on the lower interlayer insulating layer, the phase changeable pattern covering at least two of the plurality of conductive plugs, wherein the phase changeable material pattern includes a plurality of first regions in contact with one or more of the plurality of conductive plugs and at least one second region interposed between the plurality of the first regions, wherein the at least one second region has a lower thermal conductivity than the plurality of first regions. The phase changeable memory cell array region also includes an upper interlayer insulating layer covering at least one of the phase changeable material pattern and the lower interlayer insulating layer.
    Type: Grant
    Filed: October 16, 2006
    Date of Patent: December 29, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyeong-Geun An, Hideki Horii, Sang-Yeol Kang
  • Patent number: 7605087
    Abstract: A method of forming a semiconductor device is provided. An interlayer dielectric is formed on a substrate. A di-block polymer layer that includes a plurality of first polymer blocks and a plurality of second polymer blocks is formed on the interlayer dielectric. The di-block polymer layer is divided into a first phase to which the first polymer blocks are bound and a second phase to which the second polymer blocks are bound. The second phase is removed so that at least part of the first phase remains in place, where the remaining first phase defines at least part of a pore. The interlayer dielectric that is exposed beneath the pore is etched to form an opening. The opening may have a smaller width than the minimum feature size that a photolithography process is capable of resolving. As a result, a linewidth of an electrode that may be formed to fill the opening may be reduced.
    Type: Grant
    Filed: July 30, 2007
    Date of Patent: October 20, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Hideki Horii
  • Patent number: 7575776
    Abstract: A phase changeable memory element is formed by conformally forming a phase changeable material film in a contact hole on a substrate so as to create a void in the phase changeable material film in the contact hole. A capping film is formed on the phase changeable material film, and the void is at least partially closed by a thermal treatment that is sufficient to reflow the phase changeable material film in the void.
    Type: Grant
    Filed: August 23, 2007
    Date of Patent: August 18, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Hideki Horii
  • Patent number: 7569430
    Abstract: The present invention relates to a phase changeable structure having decreased amounts of defects and a method of forming the phase changeable structure. A stacked composite is first formed by (i) forming a phase changeable layer including a chalcogenide is formed on a lower electrode, (ii) forming an etch stop layer having a first etch rate with respect to a first etching material including chlorine on the phase changeable layer, and (iii) forming a conductive layer having a second etch rate with respect to the first etching material on the etch stop layer. The conductive layer of the stacked composite is then etched using the first etching material to form an upper electrode. The etch stop layer and the phase changeable layer are then etched using a second etching material that is substantially flee of chlorine to form an etch stop pattern and a phase changeable pattern, respectively.
    Type: Grant
    Filed: February 13, 2007
    Date of Patent: August 4, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun-Soo Bae, Hideki Horii, Ji-Hye Yi, Young-Soo Lim
  • Patent number: 7558100
    Abstract: A phase change memory device may include an integrated circuit substrate and first and second phase change memory elements on the integrated circuit substrate. The first phase change memory element may include a first phase change material having a first crystallization temperature. The second phase change memory element may include a second phase change material having a second crystallization temperature. Moreover, the first and second crystallization temperatures may be different so that the first and second phase change memory elements are programmable at different temperatures. Related methods and systems are also discussed.
    Type: Grant
    Filed: July 25, 2007
    Date of Patent: July 7, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-Ho Ahn, Hideki Horii, Jun-Soo Bae
  • Publication number: 20090073754
    Abstract: In a program method for a multi-level phase change memory device, multi-level data to be programmed in a selected memory cell is received, and a program signal is applied to the selected memory cell according to the received multi-level data. Herein, a rising time of the program signal is set to be longer than a falling time of the program signal.
    Type: Application
    Filed: September 11, 2008
    Publication date: March 19, 2009
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jun-Soo Bae, Hideki Horii, Jong-Chan Shin
  • Patent number: 7498064
    Abstract: A phase changeable memory element is formed by conformally forming a phase changeable material film in a contact hole on a substrate so as to create a void in the phase changeable material film in the contact hole. The void is at least partially closed by impinging a laser beam on the phase changeable material film sufficiently to reflow the phase changeable material film in the void.
    Type: Grant
    Filed: March 3, 2005
    Date of Patent: March 3, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Hideki Horii
  • Publication number: 20090052236
    Abstract: Provided is a resistance variable memory device and a method for operating same. The resistance variable memory device has a phase change material between a top electrode and a bottom electrode. In the method for operating a resistance variable memory, the write current is applied in a direction from the top electrode to the bottom electrode, and the read current is applied in a direction from the bottom electrode to the top electrode. The phase change material is programmed by applying the write current, and a resistance drift of the phase change material is restrained by applying the read current.
    Type: Application
    Filed: August 22, 2008
    Publication date: February 26, 2009
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jun-Soo Bae, Hideki Horii, Mi-Lim Park
  • Publication number: 20090052235
    Abstract: Provided is a method of programming a resistance variable memory device. The resistance variable memory device includes a memory cell having multi states and a write driver outputting a program pulse for programming the memory cell into one of the multi states. The method of programming the resistance variable memory device includes applying a first program pulse to the resistance variable memory device and applying a second program pulse to a memory cell when the memory cell is programmed into an intermediate state. When the first program pulse is a reset pulse, the reset pulse is an over program pulse, that is, an over reset pulse. Therefore, the resistance variable memory device can secure a sufficient read margin as well as improve a resistance drift margin.
    Type: Application
    Filed: August 18, 2008
    Publication date: February 26, 2009
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Hideki Horii, Jun-Soo Bae
  • Patent number: 7495456
    Abstract: Provided are a system and method of determining pulse properties of a semiconductor device. An embodiment of the system includes at least one pair of first and second probes electrically contacting terminals of the semiconductor resistance device, a pulse generator connected to the first probe and outputting pulse signals, an oscilloscope having at least one pair of first and second channels, wherein the pulse electric signal is supplied to the first channel and the first probe and the second channel is connected to the second probe. The oscilloscope calculates a pulse current flowing in terminals of the semiconductor resistance device using the second channel and determines a dynamic resistance of the semiconductor resistance device using the first and second channels.
    Type: Grant
    Filed: February 24, 2006
    Date of Patent: February 24, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hideki Horii, Yong-Ho Ha
  • Publication number: 20080272357
    Abstract: A phase-changeable memory device may include a substrate, an insulating layer on the substrate, first and second electrodes, and a pattern of a phase-changeable material between the first and second electrodes. More particularly, the insulating layer may have a hole therein, and the first electrode may be in the hole in the insulating layer. Moreover, portions of the second electrode may extend beyond an edge of the pattern of phase-changeable material. Related methods are also discussed.
    Type: Application
    Filed: June 4, 2008
    Publication date: November 6, 2008
    Inventors: Hideki Horii, Suk-Ho Joo, Ji-Hye Yi
  • Publication number: 20080237566
    Abstract: A phase change memory device and method of manufacturing the same is provided. A first electrode having a first surface is provided on a substrate. A second electrode having a second surface at a different level from the first surface is on the substrate. The second electrode may be spaced apart from the first electrode. A third electrode may be formed corresponding to the first electrode. A fourth electrode may be formed corresponding to the second electrode. A first phase change pattern may be interposed between the first surface and the third electrode. A second phase change pattern may be interposed between the second surface and the fourth electrode.
    Type: Application
    Filed: September 28, 2007
    Publication date: October 2, 2008
    Inventors: Hyeong-Geun AN, Hideki HORII, Jong-Chan SHIN, Dong-Ho AHN, Jun-Soo BAE, Jeong-Hee PARK
  • Publication number: 20080173858
    Abstract: Phase change memory devices include a heating electrode on a substrate and a phase change material pattern on the heating electrode. An adhesive pattern is disposed between the heating electrode and the phase change material pattern. The adhesive pattern contains carbon. Methods of fabricating phase change memory devices are also provided.
    Type: Application
    Filed: January 10, 2008
    Publication date: July 24, 2008
    Inventors: Hyeong-Geun An, Hideki Horii, Min-Young Park, Shin-Hye Kim
  • Patent number: 7397092
    Abstract: A phase-changeable memory device may include a substrate, an insulating layer on the substrate, first and second electrodes, and a pattern of a phase-changeable material between the first and second electrodes. More particularly, the insulating layer may have a hole therein, and the first electrode may be in the hole in the insulating layer. Moreover, portions of the second electrode may extend beyond an edge of the pattern of phase-changeable material. Related methods are also discussed.
    Type: Grant
    Filed: March 1, 2006
    Date of Patent: July 8, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hideki Horii, Suk-Ho Joo, Ji-Hye Yi
  • Publication number: 20080149910
    Abstract: Provided is a phase-change memory device including a phase-change material pattern of which strips are shared by neighboring cells. The phase-change memory device includes a plurality of bottom electrodes arranged in a matrix array. The phase-change material pattern is formed on the bottom electrodes, and the strips of the phase-change material pattern are electrically connected to the bottom electrodes. Each strip of the phase-change material pattern is connected to at least two diagonally neighboring bottom electrodes of the bottom electrodes.
    Type: Application
    Filed: November 16, 2007
    Publication date: June 26, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyeong-geun AN, Hideki HORII, Jong-chan SHIN, Dong-ho AHN, Jun-soo BAE
  • Publication number: 20080093590
    Abstract: Provided are a phase change memory device and a method of forming the same. According to the phase change memory, a first plug electrode and a second plug electrode are spaced apart from each other in a mold insulating layer. A phase change pattern is disposed on the mold insulating layer. The phase change pattern contacts a top of the first plug electrode and a first potion of a top of the second plug electrode. An interconnection is electrically connected to a second portion of the top of the second plug electrode.
    Type: Application
    Filed: October 16, 2007
    Publication date: April 24, 2008
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Dong-Ho Ahn, Hideki Horii, Jong-Chan Shin, Jun-Soo Bae, Hyeong-Geun An
  • Publication number: 20080068879
    Abstract: A phase change memory device may include an integrated circuit substrate and first and second phase change memory elements on the integrated circuit substrate. The first phase change memory element may include a first phase change material having a first crystallization temperature. The second phase change memory element may include a second phase change material having a second crystallization temperature. Moreover, the first and second crystallization temperatures may be different so that the first and second phase change memory elements are programmable at different temperatures. Related methods and systems are also discussed.
    Type: Application
    Filed: July 25, 2007
    Publication date: March 20, 2008
    Inventors: Dong-Ho Ahn, Hideki Horii, Jun-Soo Bae
  • Publication number: 20080064217
    Abstract: A method of forming a semiconductor device is provided. An interlayer dielectric is formed on a substrate. A di-block polymer layer that includes a plurality of first polymer blocks and a plurality of second polymer blocks is formed on the interlayer dielectric. The di-block polymer layer is divided into a first phase to which the first polymer blocks are bound and a second phase to which the second polymer blocks are bound. The second phase is removed so that at least part of the first phase remains in place, where the remaining first phase defines at least part of a pore. The interlayer dielectric that is exposed beneath the pore is etched to form an opening. The opening may have a smaller width than the minimum feature size that a photolithography process is capable of resolving. As a result, a linewidth of an electrode that may be formed to fill the opening may be reduced.
    Type: Application
    Filed: July 30, 2007
    Publication date: March 13, 2008
    Inventor: Hideki Horii
  • Publication number: 20080048293
    Abstract: A semiconductor device includes a lower electrode including a bottom wall portion and a sidewall portion extending upwardly from the bottom wall portion, and an insulating layer located over a top edge surface of the sidewall portion of the lower electrode. The insulating layer includes a contact window which partially exposes the top edge surface of the sidewall portion of the lower electrode. The device further includes a heated pattern which contacts the partially exposed top edge surface of the sidewall portion of the lower electrode through the contact window of the insulating layer.
    Type: Application
    Filed: August 21, 2007
    Publication date: February 28, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Hideki Horii
  • Publication number: 20070286947
    Abstract: A phase changeable memory element is formed by conformally forming a phase changeable material film in a contact hole on a substrate so as to create a void in the phase changeable material film in the contact hole. A capping film is formed on the phase changeable material film, and the void is at least partially closed by a thermal treatment that is sufficient to reflow the phase changeable material film in the void.
    Type: Application
    Filed: August 23, 2007
    Publication date: December 13, 2007
    Inventor: Hideki Horii