Patents by Inventor Hideki Miwatari

Hideki Miwatari has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SIMD system having logic units arranged in stages of tree structure and operation of stages controlled through respective control registers
    Patent number: 5230057
    Abstract: In a parallel computer system using a SIMD method constituted by a controller and a plurality of processor elements, each of the processor elements has a storage unit to store data to be processed, the controller controls operation of the processor elements, and the parallel computer system performs processing of the data based on a calculation control signal transmitted from the controller. The parallel computer system further a data collection unit connected between the processor elements and the controller for receiving output data from the processor elements, performing a predetermined calculation, and outputting calculated data to the controller; and a calculation control unit connected between the data collection unit and the controller for transmitting the calculation control signal from the controller to the data calculation unit to make it possible to perform the predetermined calculation in the data collection circuit.
    Type: Grant
    Filed: September 19, 1989
    Date of Patent: July 20, 1993
    Assignee: Fujitsu Limited
    Inventors: Tatsuya Shido, Kaoru Kawamura, Masanobu Umeda, Toshiyuki Shibuya, Hideki Miwatari
  • SIMD system having logic units arranged in stages of tree structure and operation of stages controlled through respective control registers
    Patent number: RE36954
    Abstract: In a parallel computer system using a SIMD method constituted by a controller and a plurality of processor elements, each of the processor elements has a storage unit to store data to be processed, the controller controls operation of the processor elements, and the parallel computer system performs processing of the data based on a calculation control signal transmitted from the controller. The parallel computer system further a data collection unit connected between the processor elements and the controller for receiving output data from the processor elements, performing a predetermined calculation, and outputting calculated data to the controller; and a calculation control unit connected between the data collection unit and the controller for transmitting the calculation control signal from the controller to the data calculation unit to make it possible to perform the predetermined calculation in the data collection circuit.
    Type: Grant
    Filed: July 19, 1995
    Date of Patent: November 14, 2000
    Assignee: Fujitsu Ltd.
    Inventors: Tatsuya Shindo, Kaoru Kawamura, Masanobu Umeda, Toshiyuki Shibuya, Hideki Miwatari