Abstract: In an embodiment, an object of the present invention is to provide a double-stranded nucleic acid complex having a novel structure. In an embodiment, the present invention relates to a nucleic acid complex comprising a first nucleic acid strand and a second nucleic acid strand, wherein said first nucleic acid strand: (1) is capable of hybridizing to at least a part of a target transcriptional product; (2) has an antisense effect on the target transcriptional product; and (3) is a gapmer comprising a central region, and a 5? wing region and a 3? wing region, said second nucleic acid strand comprises at least one sugar-unmodified central region (first exposed region) consisting of one sugar-unmodified ribonucleoside or two or three contiguous sugar-unmodified ribonucleosides linked by an internucleoside bond, which is or are complementary to a part of said first nucleic acid strand, and said first nucleic acid strand is annealed to said second nucleic acid strand.

Abstract: Provided is a composition for promotion of the regeneration of the nucleus pulposus of an intervertebral disc, said composition comprising a low endotoxin monovalent metal salt of alginic acid and mesenchymal stem cells. In particular, the composition of the present invention promotes the regeneration of the nucleus pulposus of an intervertebral disc via activation of nucleus pulposus cells by human bone marrow-derived high-purity mesenchymal stem cells and/or differentiation of human bone marrow-derived high-purity mesenchymal stem cells into nucleus pulposus cells.

Abstract: A method for manufacturing a rechargeable battery includes forming a mixture layer and an insulating layer on an electrode substrate having an edge extending in a specified direction so that an exposed portion where the electrode substrate is exposed extends between the edge and the insulating layer; pressing the mixture layer; and stretching an extension portion, located between the edge and the mixture layer, and the insulating layer in the specified direction. The stretching includes applying a stress greater than or equal to yield stress of the electrode substrate or greater than or equal to 0.2% proof stress of the electrode substrate and less than tensile strength of the electrode substrate to the extension portion, and applying a stress greater than or equal to yield stress of the insulating layer or greater than or equal to 0.2% proof stress of the insulating layer to the insulating layer.

Abstract: A memory system includes a nonvolatile memory including memory cells each configured to store first and second bits, and a memory controller. The memory controller is configured to: read first data by using a first voltage to a first read process that reads data corresponding to the first bit from the memory cells; read second data by using a second voltage to a second read process that reads data corresponding to the second bit from the memory cells; in a case where an error correction process of the first data is successful, determine a third voltage, based on the first data and third data that is obtained by error-correcting the first data; and update a first read voltage that is used to the first read process, from the first voltage to the third voltage.

Abstract: A memory system according to an embodiment includes a memory device, and a memory controller. The memory device includes first and second memory cells, a first word line, and first and second bit lines. The first and second memory cells are provided in first and second layers, respectively. The first word line is coupled to the first memory cell and the second memory cell. The first bit line is coupled to the first memory cell. The second bit line is coupled to the second memory cell. The memory controller includes a storage circuit capable of storing a correction value table. The correction value table is configured to store a first correction value of a read voltage associated with the first layer and a second correction voltage of a read voltage associated with the second layer.

Abstract: A memory controller according to an embodiment includes a control circuit configured to duplicate and store data received from an external host device. The control circuit is configured to, when a write request specifying first data and a first logical address is received: i) allocate a first physical address corresponding to a first bit to the first logical address, and order a first memory device to write the first data to the first physical address; and ii) allocate a first mirroring physical address corresponding to a second bit to the first physical address, and order a second memory device to write the first data to the first mirroring physical address. A number of reads the first bit is different from a number of reads for the second bit.

Abstract: A memory system according to an embodiment includes a memory device, and a memory controller. The memory device includes first and second memory cells, a first word line, and first and second bit lines. The first and second memory cells are provided in first and second layers, respectively. The first word line is coupled to the first memory cell and the second memory cell. The first bit line is coupled to the first memory cell. The second bit line is coupled to the second memory cell. The memory controller includes a storage circuit capable of storing a correction value table. The correction value table is configured to store a first correction value of a read voltage associated with the first layer and a second correction voltage of a read voltage associated with the second layer.

Abstract: According to one embodiment, a shift register memory writes data having a first size corresponding to a capacity of a block to a plurality of layers of a plurality of data storing shift strings included in the block, in response to a first command sequence specifying a first write mode from a controller. In response to a second command sequence specifying a second write mode from the controller, the shift register memory writes data having a second size smaller than the capacity of the block to the plurality of layers of one or more first data storing shift strings of the plurality of data storing shift strings, without writing data to each of other data storing shift strings except the one or more first data storing shift strings.

Abstract: In connection with a write operation, a memory controller transmits a first command sequence to a memory chip, thereby causing the memory chip to execute a first-stage program operation that includes a first operation and a first part of a second operation after the first operation, and a second command sequence to the memory chip after the first-stage program operation is executed, thereby causing the memory chip to execute a second-stage program operation that includes a second part of the second operation and no part of the first operation. During the first operation, a program voltage is applied a plurality of times while increasing the program voltage each of the times by a first step size. During the second operation, the program voltage is applied a plurality of times while increasing the program voltage each of the times by a second step size smaller than the first step size.

Abstract: Provided is an electric tool with which work efficiency can be improved. A controller of an electric tool can execute: a first control, whereby during a non-operating state after a motor has started up and before a tip tool is set to be in an operating state, the motor is driven at a slow idling rotation speed, and when the tip tool is set to be in the operating state, the motor is driven at a normal rotation speed which is higher than the slow idling rotation speed; and a second control, whereby in a case where a trigger switch has been turned off in a state where the motor is being driven at the normal rotation speed and the trigger switch is thereafter turned on again under a prescribed condition, the motor is driven at the normal rotation speed regardless of the state of the tip tool.

Abstract: According to one embodiment, an information processing device includes: a first memory; a first receiver; a first determination section; and a first transmitter. The first memory is configured to store first image data of interior of a vehicle at a first point in time. The first receiver is configured to receive second image data of the interior of the vehicle at a second point of time from the vehicle. The first determination section is configured to determine whether a change has been caused in the interior of the vehicle between the first point in time and the second point in time. The first transmitter is configured to transmit first data based on the determination result.

Abstract: A compressor system includes: a first compressor including a first casing having a cylindrical shape, and a first bundle capable of being inserted into and pulled out from the first casing in an axial direction of the first casing; and a second compressor including a second casing having a cylindrical shape, and a second bundle capable of being inserted into and pulled out from the second casing in an axial direction of the second casing. The first and second compressors are arranged to face each other to cause pullout directions of the respective bundles to be opposite to each other. A maintenance space shareable for insertion and pullout operations of the first bundle and insertion and pullout operations of the second bundle is interposed between the first bundle and the second bundle, and is available for the bundle under the insertion and pullout operations.

Abstract: An inverter is disposed adjacent to a motor. The inverter includes a plurality of power modules, a smoothing capacitor, and busbars connecting the power modules and the smoothing capacitor. The plurality of power modules are disposed to be arranged along the periphery of the smoothing capacitor. The smoothing capacitor is disposed at a central portion of the inverter and also disposed in the inner portion of the inverter such that the smoothing capacitor and each of the power modules are arranged on the same plane.

Abstract: According to one embodiment, an information processing device includes: a first memory; a first receiver; a first determination section; and a first transmitter. The first memory is configured to store first image data of interior of a vehicle at a first point in time. The first receiver is configured to receive second image data of the interior of the vehicle at a second point of time from the vehicle. The first determination section is configured to determine whether a change has been caused in the interior of the vehicle between the first point in time and the second point in time. The first transmitter is configured to transmit first data based on the determination result.

Abstract: A memory controller according to an embodiment includes a control circuit configured to duplicate and store data received from an external host device. The control circuit is configured to, when a write request specifying first data and a first logical address is received: i) allocate a first physical address corresponding to a first bit to the first logical address, and order a first memory device to write the first data to the first physical address; and ii) allocate a first mirroring physical address corresponding to a second bit to the first physical address, and order a second memory device to write the first data to the first mirroring physical address. A number of reads the first bit is different from a number of reads for the second bit.

Abstract: A memory device includes a first block including a first memory cell and a first word line connected to the first memory cell, a second block including a second memory cell and a second word line connected to the second memory cell, and a control circuit. The control circuit applies a first voltage to each of the first and second word lines to supply a first erase pulse having a first erase intensity to each of the first and second blocks, when a first erase operation is executed, and applies the first voltage to the first word line and a second voltage higher than the first voltage to the second word line, to supply the first erase pulse to the first block and a second erase pulse having a second erase intensity less than the first erase intensity to the second block, when a second erase operation is executed.

Abstract: According to one embodiment, a memory system includes a semiconductor memory device and a controller. The semiconductor memory device includes a first memory cell configured to store data. The controller is configured to output a first parameter and a first command. The first parameter relates to an erase voltage for a first erase operation with respect to the first memory cell. The first command instructs the first erase operation. The controller outputs the first command after outputting the first parameter to the semiconductor memory device.

Abstract: According to the one embodiment, a memory system includes a semiconductor memory device and a memory controller. The semiconductor memory device includes: first and second memory cells stacked above a substrate; a first word line coupled to the first and second memory cells; a first bit line coupled to the first memory cell; and a second bit line coupled to the second memory cell. A first state read operation includes a first read operation for reading data from the first memory cell and a second read operation for reading data from the second memory cell. A first read voltage is applied to the first word line during a first period for executing the first read operation, and a second read voltage is applied to the first word line during a second period for executing the second read operation.

Abstract: A suspending tool includes a suspending tool main body that extends to be parallel with an axial direction above a rotor main body, a pair of bearing supporting portions that are disposed at an interval in the axial direction and are detachable from the bearing portions, a pair of seal supporting portions that are disposed inside the pair of bearing supporting portions in the axial direction at an interval in the axial direction and are detachable from the seal portions, and a plurality of diaphragm supporting portions that are disposed inside the pair of seal supporting portions in the axial direction such that the diaphragm supporting portions are disposed at intervals in the axial direction and are detachable from the diaphragms.

Abstract: An information processing device to reserve a parking lot for a vehicle includes a reception unit; a first retrieval unit; a second retrieval unit; and a reservation unit. The reception unit receives first information regarding a destination of the vehicle. The first retrieval unit retrieves a route to the destination based on the first information. The second retrieval unit retrieves a route to the destination, a first area around the route, and first time. The reservation unit requests a reservation for a first parking lot in the first area at the first time using wireless or wired communication without waiting for an instruction from a user.