Abstract: A data buffer receives and temporarily stores data including a product code enabling error correction in first and second directions. An exclusive-OR operation circuit uses an error amount detected by error correction in the first direction and data stored in a storage element to calculate a first error check result. A PI direction error-checking circuit according to the first error check result performs error check after error correction in the first direction. A PO direction partial error-checking circuit and a PO direction aggregate error-checking circuit use an error amount detected in error correction in the second direction and calculate a second error check result. The first and second error check results are used to generate a final error check result by an exclusive-OR operation circuit.

Abstract: A semiconductor integrated circuit device of low power consumption having a hierarchical structure is obtained. This semiconductor integrated circuit device employs at least one gated clock selected from a group including at least three gated clocks consisting of at least two gated clocks generated by employing at least two operation control signals output to different hierarchies as gate signals and a prescribed gated clock input in a circuit block of the most significant hierarchy as a gated clock input in circuit blocks of lower hierarchies below a third hierarchy among the plurality of circuit blocks. Thus, a plurality of gated clocks for reducing power consumption are readily mechanically decided. When at least one gated clock satisfying a prescribed circuit constraint is selected from the plurality of gated clocks, a semiconductor integrated circuit device of low power consumption is readily obtained.

Abstract: Structure information on picture within a GOP of a coded data sequence is acquired beforehand. At the time of high-speed reproduction, a high-speed reproduction mode judging unit judges by referring to the picture structure information whether a high-speed smooth reproduction is possible or not. If the high-speed reproduction is possible, a high-speed smooth reproduction control unit performs the high-speed smooth reproduction. If not possible, a high-speed skip reproduction control unit performs high-speed skip reproduction. For reverse reproduction, image data for one GPO, for example, are recoded by an MPEG encoder and then the recoded image data are stored in a storage. Then, a coded data amount predicted from the structure information on the picture within the GOP is compared with the capacity of the storage, and a countermeasure such as raising a compression ratio is taken if the estimated coded data amount exceeds the capacity of the storage.

Abstract: A color card showing at least three color samples is provided. Among the color samples, a light color sample expressing a light color tone occupies a larger space than samples expressing the other color tones. A deep color sample expressing a deep color tone in the color card is arranged on one side of the light color sample, and a neutral color sample expressing a neutral color tone which stands between the light and deep color tones is arranged on the other side. Use of such a color card allows the user to roughly select a color card showing a color tone suited for being applied to an object to be painted from a plurality of color cards based on their light color samples, and then select one of color tones shown in the selected color card.

Abstract: A variable-length decoding (VLD) unit performs a variable-length decoding on an MPEG video stream. An inverse quantization (IQ) unit computes a discrete-cosine-transform (DCT) coefficient by performing an inverse quantization on results of decoding by the VLD unit. An inverse-discrete-cosine-transform (IDCT) unit carries out an IDCT for the DCT coefficients computed by the IQ unit so as to convert frequency components into the original signals. A motion-compensated-prediction (MC) unit performs a best-effort reproduction processing on received frames, during the time until the arrival of a frame serving as a reference for decoding, and returns to a normal decoding processing after the reference frame has been received.

Abstract: An SRAM is used as a pixel buffer which stores a partial image region copied from a frame buffer. A vertical filter reads a pair of target pixels arranged in a vertical direction from the pixel buffer and performs a filtering process of a discrete wavelet transform in the vertical direction. An intermediate result obtained in the filtering process is stored in a register. The vertical filter uses the intermediate result in filtering the next two pixels. A horizontal filter receives two transformed results from the vertical filter and performs a filtering process on the transformed results in the horizontal direction. The intermediate results obtained in the horizontal filtering are also stored in a register and utilized in the next filtering.

Abstract: A volume adjustment unit reduces the volume of audio data. By coding the audio data where the volume is reduced in advance, the possibility of being decoded in a manner of exceeding the maximum bit number at a reproduction-side apparatus is reduced. Thus, the volume adjustment unit needs to reduce the volume of the audio data during a processing at a data input unit up to a quantization coding unit, that is, before the end of quantizing, based on a compression ratio.

Abstract: An original image shot by a shooting unit is read in a frame buffer and transformed by a wavelet transformer. An evaluating unit monitors the coefficients of the HL, LH, HH sub-bands generated by the wavelet transformer and checks the number of the high frequency components in the original image. If there are sufficient high frequency components, the quality of the original image is judged to be good, and if not, the image quality is judged not to be good because of camera shake or the like. The evaluating unit sends a coding indication signal to a quantizer if the image quality is good. Thereby the wavelet transformed image is coded. If the image quality is not good, the evaluating unit sends a re-shooting indication signal to the shooting unit.

Abstract: A wavelet transform is applied to an original image, so as to generate an image of a first hierarchy. Among the thus generated image of the first hierarchy, each of high-frequency sub-band components 1HL, 1LH and 1HH are immediately quantized and coded so as to be temporarily stored in a coded data storage. Another wavelet transform is applied to an LL sub-band component, among the image of the first hierarchy, so as to generate an image of a second hierarchy. Thereafter, an image of a third hierarchy is generated from an LL sub-band component in the image of the second hierarchy. During such a process, quantization and coding processings are performed in parallel with transformation processings. After all processings are completed and the coded data are prepared, coded image data complying with the JPEG2000 standard are generated by first reading out low-frequency components in sequence from the prepared coded data.

Abstract: In a fluorescent lamp having a plurality of glass tubes that are connected with each other to form a discharge path, spacers that do not drop off even with insufficient accuracy of a gap between the glass tube are provided in a gap between the connected glass tubes, so as to improve the gap compression resistance and the torsion resistance. Each spacer is composed of a plurality of tonguelets and a bridge. The tonguelets are in contact with surfaces of the glass tubes and are connected by the bridge that is directed in an axial direction of the glass tubes.

Abstract: When a reverse reproduction is instructed in an image reproducing apparatus (1), reproduced image data per picture generated by an MPEG video decoder (5) in a time series manner are inputted to an MPEG video encoder (6) so as to be recoded to I picture alone or B picture combined with I picture. An MPEG video decoder 7 reads out this recoded data sequence in a reverse time-series manner and decodes it successively, and displays a smooth reverse reproduced image. As the case may be, a data amount reducing circuit which reduces resolution and a data amount restoring circuit which restores the resolution are inserted therebetween. The reverse reproduction which is superior in ease of operation, cost merit, implemented area and so forth is realized.

Abstract: A bit-plane processor reads out a code block, which serves as a unit for arithmetic coding, from an SRAM. After converting the code block to the form of a bit-plane, the bit-plane processor supplies bit data to a pass processor. The pass processor includes an s pass processor, an r pass processor and a c pass processor. Each of s pass, r pass and c pass processings are executed in parallel in a state such that start time thereof is shifted by a predetermined unit time by operation of two delay units.

Abstract: LL subbands of first and second intermediate images obtained by an inverse quantizer are stored in an intermediate image memory. A scene change judging unit compares data stored in the intermediate image memory and thereby determines whether there is a scene change or not.

Abstract: An image data transmission apparatus comprising: a transmission unit that transmits image data; and a control unit that controls the amount of image data to be transmitted in accordance with information concerning the transmission rate of the image data. An image data receiving apparatus comprising: a receiving unit that receives image data; and a control unit that controls the amount of image data received in accordance with information concerning the transmission rate of the image data.

Abstract: A semiconductor integrated circuit device of low power consumption having a hierarchical structure is obtained. This semiconductor integrated circuit device employs at least one gated clock selected from a group including at least three gated clocks consisting of at least two gated clocks generated by employing at least two operation control signals output to different hierarchies as gate signals and a prescribed gated clock input in a circuit block of the most significant hierarchy as a gated clock input in circuit blocks of lower hierarchies below a third hierarchy among the plurality of circuit blocks. Thus, a plurality of gated clocks for reducing power consumption are readily mechanically decided. When at least one gated clock satisfying a prescribed circuit constraint is selected from the plurality of gated clocks, a semiconductor integrated circuit device of low power consumption is readily obtained.

Abstract: In a fluorescent lamp having a plurality of glass tubes that are connected with each other to form a discharge path, spacers that do not drop off even with insufficient accuracy of a gap between the glass tube are provided in a gap between the connected glass tubes, so as to improve the gap compression resistance and the torsion resistance. Each spacer is composed of a plurality of tonguelets and a bridge. The tonguelets are in contact with surfaces of the glass tubes and are connected by the bridge that is directed in an axial direction of the glass tubes.

Abstract: A data buffer receives and temporarily stores data including a product code enabling error correction in first and second directions. An exclusive-OR operation circuit uses an error amount detected by error correction in the first direction and data stored in a storage element to calculate a first error check result. A PI direction error-checking circuit according to the first error check result performs error check after error correction in the first direction. A PO direction partial error-checking circuit and a PO direction aggregate error-checking circuit use an error amount detected in error correction in the second direction and calculate a second error check result. The first and second error check results are used to generate a final error check result by an exclusive-OR operation circuit.

Abstract: A counter is provided in an SRAM using a CSP (Chip Scale Package). The counter includes n+1 stages of flipflops, counts the number of pulses of an address clock signal when a test signal attains “H” level, and outputs a group of address signals. Compared with a conventional SRAM to which the group of address signals is externally input, the number of external pins necessary when a test is conducted can be reduced, and a test board can be formed using a single-layer interconnection. Consequently, reduction of costs of testing is achieved.

Abstract: A microwave oven includes a heating chamber containing a magnetron for heating and cooking food S, a body with a door provided in front of the heating chamber, and a control circuitry provided on the body for controlling driving of the magnetron. The control circuitry includes a switch key for switching either to a cooking time input mode for setting and inputting time period for driving magnetron or to an optional timer input mode for setting and inputting time period for an optional timer, input ten keys for inputting the time period of the set input mode, a timer body for separately counting time periods of respective input modes input by the ten keys, a display portion for displaying time count of either one of the input modes switched by the switch key, and a start key for starting time count for the input time period on display portion.

Abstract: A high frequency heating device having a switching member screwed into a screw hole formed in a flange and fixed to the exterior. When the exterior is fixed to the body, a through-hole formed at that portion in the rear plate of the body through which the switching member passes is too large for the switching member. Thus, while the switching member is fixable to the exterior, the switching member cannot be fixed to the body onto which the exterior is not mounted. Therefore, a high frequency heating device can be provided, wherein an exterior switch more surely keeps the power supply circuit open when the exterior is removed.