Patents by Inventor Hidenori Endo

Hidenori Endo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6739501
    Abstract: A cash drawer device includes a command receiving and outputting circuit for receiving a plurality of open commands and outputs the open commands, and a simultaneous open inhibiting circuit for inhibiting the command receiving and outputting circuit from simultaneously outputting more than one of the open commands when more than one of the open commands are simultaneously received by the command receiving and outputting circuit. A first simultaneous open inhibiting circuits includes an exclusive OR gate. A second simultaneous open inhibiting circuit includes first and second D flip-flops. The cash drawer device may further include a concurrent open inhibiting circuit having a timer responsive to one of the open commands for inhibiting the command receiving and outputting circuit from outputting another of the open commands for a predetermined interval. Thus, power consumption of driving a plurality of drawers can be suppressed. The invention also includes a method of controlling cash drawers.
    Type: Grant
    Filed: September 18, 2001
    Date of Patent: May 25, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazuya Murakami, Masafumi Furui, Hidenori Endo, Yoshihiro Nakamura
  • Publication number: 20020033413
    Abstract: It includes first and command receiving and outputting circuit for receiving a plurality of open commands and outputs the open commands; and a simultaneous open inhibiting circuit for inhibiting the command receiving and outputting means from simultaneously outputting more than one of the open commands when more than one of the open commands are simultaneously received by the command receiving and outputting circuit. The first simultaneous open inhibiting circuits comprises an exclusive OR gate. The second simultaneous open inhibiting circuit comprises first and second D flip-flops. It may further comprise a concurrent open inhibiting circuit including a timer responsive to one of the open commands for inhibiting the command receiving and outputting circuit from outputting another of the open commands for a predetermined interval. The corresponding method is also disclosed. Thus, simultaneous power consumption of driving a plurality of drawers can be suppressed.
    Type: Application
    Filed: September 18, 2001
    Publication date: March 21, 2002
    Inventors: Kazuya Murakami, Masafumi Furui, Hidenori Endo, Yoshihiro Nakamura