Patents by Inventor Hideo Aoki
Hideo Aoki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240125561Abstract: A cooling device includes: a container in which a refrigerant is sealed; an evaporating part that evaporates the refrigerant in a liquid phase by heat reception inside the container; a condensing part that condenses the refrigerant in a gas phase by heat dissipation inside the container; and a plate-shaped or block-shaped flow path member in which a plurality of flow paths configured to transport the refrigerant in a liquid phase from the condensing part to the evaporating part by surface tension inside the container is formed in parallel.Type: ApplicationFiled: December 21, 2023Publication date: April 18, 2024Applicant: FUJITSU LIMITEDInventors: Kento OHGA, Hideo KUBO, Kenji SASABE, Masahide KODAMA, Atsushi ENDO, Keita HIRAI, Nobumitsu AOKI, Takashi URAI
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Publication number: 20230076668Abstract: A method for manufacturing a semiconductor device of an embodiment, comprises a step of mounting a first semiconductor element on a board and a step of accommodating a member in which a plate-shaped member and a first adhesive layer are stacked in a collet and pressure-bonding the heated first adhesive layer on the board on which the first semiconductor element is mounted. The collet has a member having the first Young's modulus and a second member having a second Young's modulus which is lower than the first Young's modulus on a surface that accommodates the member in which the plate-shaped member and the first adhesive layer are stacked.Type: ApplicationFiled: March 9, 2022Publication date: March 9, 2023Applicant: Kioxia CorporationInventors: Satoshi TSUKIYAMA, Hideo AOKI, Tsukasa KONNO
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Publication number: 20230058480Abstract: A semiconductor device according to the present embodiment includes a substrate and a semiconductor chip. The substrate has a first face and a plurality of conductive connection parts provided on the first face. The semiconductor chip has a second face that faces the first face and a plurality of connection bumps provided on the second face and electrically connected to the plurality of conductive connection parts. The conductive connection part arranged in a chip outer peripheral region of a chip region on the first face where the semiconductor chip is arranged is different in thickness from the conductive connection part arranged in a chip central region of the chip region.Type: ApplicationFiled: March 10, 2022Publication date: February 23, 2023Applicant: Kioxia CorporationInventors: Satoshi TSUKIYAMA, Hideo AOKI, Hiroshi OOTA, Tomoyasu YAMADA, Yuki TAKAHASHI
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Publication number: 20220246516Abstract: A semiconductor device according to an embodiment includes a substrate and a semiconductor chip. The semiconductor chip is provided over the substrate. The substrate includes a wire layer and an insulating layer. The wire layer includes a wire electrically connected to the semiconductor chip. The insulating layer is provided in contact with the wire layer and includes a glass woven fabric containing a resin. The glass woven fabric includes a plurality of glass fibers that are provided along two or more directions parallel with the glass woven fabric and are woven. The glass fibers differ in at least one of the material, number, and thickness depending on the directions parallel with the glass woven fabric.Type: ApplicationFiled: August 30, 2021Publication date: August 4, 2022Applicant: Kioxia CorporationInventors: Hideo AOKI, Hideko MUKAIDA, Satoshi TSUKIYAMA
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Patent number: 11250951Abstract: Example implementations described herein are directed to systems and methods for feature preparation that receives patient feature data and determines similarity of pre-stored models with the patient feature data. In an example implementation, a database of the pre-stored models is analyzed to assess similarity indicating that feature preparation of the pre-stored models is compatible with the patient feature data. For similarity indicative of feature preparation to be utilized, the feature preparation is conducted for the patient feature data based on the pre-stored model determined to be similar. The feature preparation retrieves reusable features associate with the similar pre-stored model, where the reusable features comprise pre-calculated features of the model. A machine learning model is generated using results of the feature preparation and patient feature data; and a prediction is provided using the machine learning model.Type: GrantFiled: March 30, 2018Date of Patent: February 15, 2022Assignee: HITACHI, LTD.Inventors: Mika Takata, Hideo Aoki
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Patent number: 10943844Abstract: A semiconductor device includes a first semiconductor chip, a second semiconductor chip thicker than the first semiconductor chip, a plurality of bumps provided between the first and second semiconductor chips and electrically connecting the first and second semiconductor chips, an adhesive resin provided between the first and second semiconductor chips and bonding the first and second semiconductor chips, and a sealing resin encapsulating the first and second semiconductor chips. At least one of the first and second semiconductor chips has an organic protective film disposed thereon.Type: GrantFiled: February 5, 2019Date of Patent: March 9, 2021Assignee: TOSHIBA MEMORY CORPORATIONInventors: Satoshi Tsukiyama, Hideo Aoki, Masatoshi Kawato, Masayuki Miura, Masatoshi Fukuda, Soichi Homma
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Patent number: 10892251Abstract: According to one embodiment, a semiconductor device includes a wiring board, a controller chip that is provided on the wiring board and is sealed with a first resin composition, a nonvolatile memory chip that is provided on the first resin composition and is sealed with a second resin composition, a second bonding wire that connects a pad for electric power supply wiring of the controller chip to the wiring board and is sealed with the first resin composition, and a first bonding wire that connects a pad for signal wiring of the controller chip to the wiring board, is sealed with the first resin composition, and has a higher Pd content than that of the second bonding wire.Type: GrantFiled: September 3, 2019Date of Patent: January 12, 2021Assignee: TOSHIBA MEMORY CORPORATIONInventors: Satoshi Tsukiyama, Hideo Aoki
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Patent number: 10861812Abstract: An electronic apparatus includes first and second packages. The first package includes a first semiconductor chip between opposing first and second surfaces of the first package, a plurality of terminals on the first semiconductor chip facing a first direction that is perpendicular to the first and second surface, the terminals including first input/output terminals and a second input/output terminal, and a plurality of bumps that are electrically connected to the plurality of first input/output terminals at positions that are directly below the first semiconductor chip in the first direction. The second package includes a second semiconductor chip provided on the second surface of the first package, a wire that electrically connects the second semiconductor chip to a conductor that is electrically connected to the second input/output terminal, and coating resin that covers the second surface of the first package, the second semiconductor chip and the wire.Type: GrantFiled: February 20, 2019Date of Patent: December 8, 2020Assignee: Toshiba Memory CorporationInventor: Hideo Aoki
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Publication number: 20200303346Abstract: According to one embodiment, a semiconductor device includes a wiring board, a controller chip that is provided on the wiring board and is sealed with a first resin composition, a nonvolatile memory chip that is provided on the first resin composition and is sealed with a second resin composition, a second bonding wire that connects a pad for electric power supply wiring of the controller chip to the wiring board and is sealed with the first resin composition, and a first bonding wire that connects a pad for signal wiring of the controller chip to the wiring board, is sealed with the first resin composition, and has a higher Pd content than that of the second bonding wire.Type: ApplicationFiled: September 3, 2019Publication date: September 24, 2020Applicant: TOSHIBA MEMORY CORPORATIONInventors: Satoshi TSUKIYAMA, Hideo AOKI
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Patent number: 10707193Abstract: According to one embodiment, a semiconductor device of an embodiment includes a substrate, a metal plate having a main portion having a first width in a first direction and a second width in a second direction orthogonal to the first direction, a first semiconductor chip located between the metal plate and the substrate, the first semiconductor chip having a third width in the first direction and a fourth width in the second direction, and a second semiconductor chip located between the first semiconductor chip and the substrate, wherein the first width is smaller than the third width, and the second width is smaller than the fourth width.Type: GrantFiled: March 1, 2018Date of Patent: July 7, 2020Assignee: TOSHIBA MEMORY CORPORATIONInventors: Satoshi Tsukiyama, Hideo Aoki, Yoshiaki Goto
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Patent number: 10707174Abstract: According to one embodiment, a semiconductor device includes a device region covered with a resin film and a dicing region extending along at least one side of the device region, the dicing region including at least a first lithography mark and a second lithography mark. The resin film includes a first dicing region portion which covers a portion of the dicing region between the first lithography mark and the second lithography mark.Type: GrantFiled: March 1, 2018Date of Patent: July 7, 2020Assignee: TOSHIBA MEMORY CORPORATIONInventors: Satoshi Tsukiyama, Hideo Aoki
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Publication number: 20200091102Abstract: An electronic apparatus includes first and second packages. The first package includes a first semiconductor chip between opposing first and second surfaces of the first package, a plurality of terminals on the first semiconductor chip facing a first direction that is perpendicular to the first and second surface, the terminals including first input/output terminals and a second input/output terminal, and a plurality of bumps that are electrically connected to the plurality of first input/output terminals at positions that are directly below the first semiconductor chip in the first direction. The second package includes a second semiconductor chip provided on the second surface of the first package, a wire that electrically connects the second semiconductor chip to a conductor that is electrically connected to the second input/output terminal, and coating resin that covers the second surface of the first package, the second semiconductor chip and the wire.Type: ApplicationFiled: February 20, 2019Publication date: March 19, 2020Inventor: Hideo AOKI
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Patent number: 10565190Abstract: An index tree search method, by a computer, for searching an index tree included in a database provided by the computer which includes processors executing a plurality of threads and a memory, the index tree search method comprising: a first step of allocating, by the computer, search ranges in the index tree to the plurality of threads; a second step of receiving, by the computer, a search key; a third step of selecting, by the computer, a thread corresponding to the received search key; and a fourth step of searching, by the computer, the index tree with the selected thread using the received search key.Type: GrantFiled: October 29, 2014Date of Patent: February 18, 2020Assignee: Hitachi, Ltd.Inventors: Tomohiro Hanai, Kazutomo Ushijima, Tsuyoshi Tanaka, Hideo Aoki, Atsushi Tomoda
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Publication number: 20190393114Abstract: A semiconductor device includes a first semiconductor chip, a second semiconductor chip thicker than the first semiconductor chip, a plurality of bumps provided between the first and second semiconductor chips and electrically connecting the first and second semiconductor chips, an adhesive resin provided between the first and second semiconductor chips and bonding the first and second semiconductor chips, and a sealing resin encapsulating the first and second semiconductor chips. At least one of the first and second semiconductor chips has an organic protective film disposed thereon.Type: ApplicationFiled: February 5, 2019Publication date: December 26, 2019Applicant: Toshiba Memory CorporationInventors: Satoshi TSUKIYAMA, Hideo AOKI, Masatoshi KAWATO, Masayuki MIURA, Masatoshi FUKUDA, Soichi HOMMA
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Patent number: 10497688Abstract: A semiconductor device according to an embodiment includes a first memory chip having a first front surface and a first back surface and having a first memory circuit provided on the first front surface side; a second memory chip having a second front surface and a second back surface facing the first front surface, having a second memory circuit provided on the second front surface side, and being electrically connected to the first memory chip; and a logic chip having the first memory chip provided between the logic chip and the second memory chip, having a third front surface and a third back surface, having a logic circuit provided on the third front surface side, and being electrically connected to the first memory chip.Type: GrantFiled: March 20, 2018Date of Patent: December 3, 2019Assignee: Toshiba Memory CorporationInventors: Satoshi Tsukiyama, Yoichiro Kurita, Hideo Aoki, Kazushige Kawasaki
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Publication number: 20190304603Abstract: Example implementations described herein are directed to systems and methods for feature preparation that receives patient feature data and determines similarity of pre-stored models with the patient feature data. In an example implementation, a database of the pre-stored models is analyzed to assess similarity indicating that feature preparation of the pre-stored models is compatible with the patient feature data. For similarity indicative of feature preparation to be utilized, the feature preparation is conducted for the patient feature data based on the pre-stored model determined to be similar. The feature preparation retrieves reusable features associate with the similar pre-stored model, where the reusable features comprise pre-calculated features of the model. A machine learning model is generated using results of the feature preparation and patient feature data; and a prediction is provided using the machine learning model.Type: ApplicationFiled: March 30, 2018Publication date: October 3, 2019Inventors: Mika TAKATA, Hideo AOKI
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Patent number: 10430287Abstract: A computer for executing processing through use of a database, the computer comprising: a processor including a cache memory; and a non-volatile memory coupled to the processor, the non-volatile memory having the database constructed thereon. The computer comprises: a database management module configured to execute processing on the database; and a write processing module configured to write data stored in the cache memory into the database. The write processing module writes data that is operated in the transaction processing into the database among data stored in the cache memory, in a case of receiving a commit request for transaction processing that uses the database.Type: GrantFiled: April 23, 2014Date of Patent: October 1, 2019Assignee: Hitachi, Ltd.Inventors: Tsuyoshi Tanaka, Yuuya Isoda, Atsushi Tomoda, Tomohiro Hanai, Hideo Aoki
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Publication number: 20190088632Abstract: According to one embodiment, a semiconductor device of an embodiment includes a substrate, a metal plate having a main portion having a first width in a first direction and a second width in a second direction orthogonal to the first direction, a first semiconductor chip located between the metal plate and the substrate, the first semiconductor chip having a third width in the first direction and a fourth width in the second direction, and a second semiconductor chip located between the first semiconductor chip and the substrate, wherein the first width is smaller than the third width, and the second width is smaller than the fourth width.Type: ApplicationFiled: March 1, 2018Publication date: March 21, 2019Inventors: Satoshi TSUKIYAMA, Hideo AOKI, Yoshiaki GOTO
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Publication number: 20190088634Abstract: A semiconductor device according to an embodiment includes a first memory chip having a first front surface and a first back surface and having a first memory circuit provided on the first front surface side; a second memory chip having a second front surface and a second back surface facing the first front surface, having a second memory circuit provided on the second front surface side, and being electrically connected to the first memory chip; and a logic chip having the first memory chip provided between the logic chip and the second memory chip, having a third front surface and a third back surface, having a logic circuit provided on the third front surface side, and being electrically connected to the first memory chip.Type: ApplicationFiled: March 20, 2018Publication date: March 21, 2019Applicant: Toshiba Memory CorporationInventors: Satoshi TSUKIYAMA, Yoichiro Kurita, Hideo Aoki, Kazushige Kawasaki
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Publication number: 20190088601Abstract: According to one embodiment, a semiconductor device includes a device region covered with a resin film and a dicing region extending along at least one side of the device region, the dicing region including at least a first lithography mark and a second lithography mark. The resin film includes a first dicing region portion which covers a portion of the dicing region between the first lithography mark and the second lithography mark.Type: ApplicationFiled: March 1, 2018Publication date: March 21, 2019Inventors: Satoshi TSUKIYAMA, Hideo AOKI