Patents by Inventor Hideo Nishikawa

Hideo Nishikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9847842
    Abstract: An optical reception circuit includes a first photodetector, a first transimpedance amplifier, a level shift circuit, a second photodetector, a second transimpedance amplifier, a peak hold circuit, and a comparator. The first transimpedance amplifier converts a first light current from the first photodetector to a first voltage. The level shift circuit generates a signal voltage from the first voltage. The second transimpedance amplifier converts the second light current from the second photodetector to a second voltage. The peak hold circuit holds a peak voltage of the second voltage as a first threshold voltage. The comparator compares the signal voltage with the first threshold voltage.
    Type: Grant
    Filed: February 23, 2015
    Date of Patent: December 19, 2017
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Hideo Nishikawa, Yuichi Niimura, Takeshi Nakasuji
  • Publication number: 20160352433
    Abstract: An optical reception circuit includes a first photodetector, a first transimpedance amplifier, a level shift circuit, a second photodetector, a second transimpedance amplifier, a peak hold circuit, and a comparator. The first transimpedance amplifier converts a first light current from the first photodetector to a first voltage. The level shift circuit generates a signal voltage from the first voltage. The second transimpedance amplifier converts the second light current from the second photodetector to a second voltage. The peak hold circuit holds a peak voltage of the second voltage as a first threshold voltage. The comparator compares the signal voltage with the first threshold voltage.
    Type: Application
    Filed: February 23, 2015
    Publication date: December 1, 2016
    Applicant: Panasonic Intellectual Property Management Co., Lt
    Inventors: HIDEO NISHIKAWA, YUICHI NIIMURA, TAKESHI NAKASUJI
  • Publication number: 20150276557
    Abstract: A state monitoring system enabling a sign of abnormality of equipment to be detected is disclosed, which includes: a storage unit to be stored with normal models obtained by analyzing, per series of manipulations, time-series learning data of sensor outputs indicated by respective units of processing equipment when normally finishing processing a raw material through the series of manipulations according to a default sequence; and a processing unit to diagnose a state of the processing equipment on the occasion of processing a specified raw material, upon an input of time-series evaluation data of the sensor output indicated by each of the units of the processing equipment on the occasion of finishing processing the specified raw material through the series of manipulations, on the basis of a comparison between the inputted data and the normal model.
    Type: Application
    Filed: March 27, 2015
    Publication date: October 1, 2015
    Inventors: Toshio MASUDA, Mutsuki KOGA, Hideo NISHIKAWA, Junichi KOKUMA, Nobuyoshi TADA
  • Patent number: 9082685
    Abstract: The optical-coupling semiconductor device includes: a primary support plate and a secondary support plate facing each other and spaced apart a predetermined distance; a light emitting device situated on the primary support plate; and a light receiving device including a light receiving surface to receive light from a light emitting surface of the light emitting device. The light emitting device is situated on a surface facing the secondary support plate of the primary support plate so that the light emitting surface is oriented toward the secondary support plate. The light receiving device is situated on a surface facing the primary support plate of the secondary support plate so that the light receiving surface faces the light emitting surface of the light emitting device. The light emitting device is on the light receiving surface of the light receiving device.
    Type: Grant
    Filed: June 17, 2014
    Date of Patent: July 14, 2015
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Takeshi Nakasuji, Yuichi Niimura, Hideo Nishikawa
  • Patent number: 9000792
    Abstract: In an inspection jig (1) for electrical inspection of printed circuit boards, an electrode section (40) has an electrode (41) disposed on a surface of an electrode plate (42), and a contact (10) includes a conductive contact needle (11), a compression coil spring (12), and an intermediate member (13) that are arranged coaxially for use. The contact needle (11) has a distal end (111), a projection (112), a larger diameter portion (113), and an intermediate portion (114), and the intermediate member (13) has a cylindrical intermediate end (131), a guide portion (132), and an electrode end (133). The electrode end (133) has a cut section at an oblique angle, is bent to have a proximal end (133a) in the vicinity of a central portion, and is held by a contact holder (30) to have an initial load. The electrode (41) is smaller in diameter than the contact (10).
    Type: Grant
    Filed: August 24, 2011
    Date of Patent: April 7, 2015
    Inventor: Hideo Nishikawa
  • Publication number: 20140374776
    Abstract: The optical-coupling semiconductor device includes: a primary support plate and a secondary support plate facing each other and spaced apart a predetermined distance; a light emitting device situated on the primary support plate; and a light receiving device including a light receiving surface to receive light from a light emitting surface of the light emitting device. The light emitting device is situated on a surface facing the secondary support plate of the primary support plate so that the light emitting surface is oriented toward the secondary support plate. The light receiving device is situated on a surface facing the primary support plate of the secondary support plate so that the light receiving surface faces the light emitting surface of the light emitting device. The light emitting device is on the light receiving surface of the light receiving device.
    Type: Application
    Filed: June 17, 2014
    Publication date: December 25, 2014
    Inventors: Takeshi NAKASUJI, Yuichi NIIMURA, Hideo NISHIKAWA
  • Patent number: 8809975
    Abstract: A semiconductor pressure sensor includes n-type semiconductor regions, which are formed in a diaphragm of a semiconductor substrate, piezoresistive elements, which are respectively formed in the n-type semiconductor regions, and conductive shielding thin film layers, which are respectively formed on the piezoresistive elements through an insulating thin film layer, and the piezoresistive elements form a Wheatstone bridge circuit. Further, the n-type semiconductor regions and the conductive shielding thin film layers are electrically connected to each other through contacts formed in the diaphragm.
    Type: Grant
    Filed: December 13, 2011
    Date of Patent: August 19, 2014
    Assignee: Panasonic Corporation
    Inventors: Yuichi Niimura, Hideo Nishikawa, Fumihito Kato
  • Publication number: 20130264664
    Abstract: A semiconductor pressure sensor includes n-type semiconductor regions, which are formed in a diaphragm of a semiconductor substrate, piezoresistive elements, which are respectively formed in the n-type semiconductor regions, and conductive shielding thin film layers, which are respectively formed on the piezoresistive elements through an insulating thin film layer, and the piezoresistive elements form a Wheatstone bridge circuit. Further, the n-type semiconductor regions and the conductive shielding thin film layers are electrically connected to each other through contacts formed in the diaphragm.
    Type: Application
    Filed: December 13, 2011
    Publication date: October 10, 2013
    Applicant: PANASONIC CORPORATION
    Inventors: Yuichi Nimura, Hideo Nishikawa, Fumihito Kato
  • Publication number: 20130009658
    Abstract: In an inspection jig (1) for electrical inspection of printed circuit boards, an electrode section (40) has an electrode (41) disposed on a surface of an electrode plate (42), and a contact (10) includes a conductive contact needle (11), a compression coil spring (12), and an intermediate member (13) that are arranged coaxially for use. The contact needle (11) has a distal end (111), a projection (112), a larger diameter portion (113), and an intermediate portion (114), and the intermediate member (13) has a cylindrical intermediate end (131), a guide portion (132), and an electrode end (133). The electrode end (133) has a cut section at an oblique angle, is bent to have a proximal end (133a) in the vicinity of a central portion, and is held by a contact holder (30) to have an initial load. The electrode (41) is smaller in diameter than the contact (10).
    Type: Application
    Filed: August 24, 2011
    Publication date: January 10, 2013
    Inventor: Hideo Nishikawa
  • Patent number: 6486689
    Abstract: A probe device is mounted on a circuit provided with a holder mountable to a circuit board testing apparatus, a contact needle attachable to the holder. The contact needle is operable to resiliently bend in a specified direction immediately after coming into contact with a circuit board. The bending absorbs a contact impact to ensure accurate measurement.
    Type: Grant
    Filed: May 26, 2000
    Date of Patent: November 26, 2002
    Assignee: Nidec-Read Corporation
    Inventor: Hideo Nishikawa
  • Patent number: 6411079
    Abstract: A printed circuit board testing apparatus is provided with a test head driving mechanism having a holder member operable to selectively hold either of a dedicated test head and a versatile-use test head for moving the held test head relative to the printed circuit board. The test head driving mechanism includes an X-driver section for driving the held test head in an X-direction, a Y-driver section for driving the held test head in a Y-direction, a Z-driver section for driving the held test head in a Z-direction perpendicularly intersecting the printed circuit board, and a &thgr;-driver section for turning the held test head about the Z-direction.
    Type: Grant
    Filed: May 30, 2000
    Date of Patent: June 25, 2002
    Assignee: Nidec-Read Corporation
    Inventor: Hideo Nishikawa
  • Patent number: 6356093
    Abstract: A printed circuit board testing apparatus includes a first measuring system for determining a relative position between a circuit board carrying table and a test head with respect to two dimensions and an angular direction, a second measuring system for determining a relative position between the table and a circuit board carried by the table with respect to two dimensions and an angular direction, and a drive system for bringing the table and the test head into a first relative positional relationship for the testing of the circuit board in accordance with the relative positions determined by the first and second measuring systems.
    Type: Grant
    Filed: June 2, 1999
    Date of Patent: March 12, 2002
    Assignee: Nidec-Read Corporation
    Inventors: Hideo Nishikawa, Kazuhiko Kaku
  • Patent number: 6353327
    Abstract: Position detection electrodes are disposed so as to be point-symmetrical relative to an arbitrary point on a line X that extends almost along the center of a printed pattern on an opposite circuit board and is parallel with the Y axis. Position detector electrodes are disposed in the same manner. A probe selector switch section can provide a probe selection signal, and a position detector sensor selection which section can provide a signal for selecting among the position detection electrodes. A detected voltage varies depending on how the position detection electrode is opposed to a printed pattern. Thus, misalignment can be detected by detecting the opposition relationship between each of the position detection electrodes and the printed pattern.
    Type: Grant
    Filed: May 13, 1998
    Date of Patent: March 5, 2002
    Assignee: Nidec-Read Corporation
    Inventor: Hideo Nishikawa
  • Publication number: 20020011861
    Abstract: Position detection electrodes are disposed so as to be point-symmetrical relative to an arbitrary point on a line X that extends almost along the center of a printed pattern on an opposite circuit board and is parallel with the Y axis. Position detector electrodes are disposed in the same manner. A probe selector switch section can provide a probe selection signal, and a position detector sensor selection which section can provide a signal for selecting among the position detection electrodes. A detected voltage varies depending on how the position detection electrode is opposed to a printed pattern. Thus, misalignment can be detected by detecting the opposition relationship between each of the position detection electrodes and the printed pattern.
    Type: Application
    Filed: May 13, 1998
    Publication date: January 31, 2002
    Inventor: HIDEO NISHIKAWA
  • Publication number: 20010050572
    Abstract: A printed circuit board testing apparatus includes a first measuring system for determining a relative position between a circuit board carrying table and a test head with respect to two dimensions and angular direction, a second measuring system for determining a relative position between the table and a circuit board carried by the table with respect to two dimensions and angular direction, and a drive system for bringing the table and test head into a first relative positional relationship for the testing of circuit board in accordance with the relative positions determined by the first and second measuring system.
    Type: Application
    Filed: June 2, 1999
    Publication date: December 13, 2001
    Inventors: HIDEO NISHIKAWA, KAZUHIKO KAKU
  • Patent number: 6151063
    Abstract: A printed circuit board inspection apparatus having upper and lower jigs with the former moveable horizontally and the latter movable vertically and with a camera mounted on the former. Reference holes are provided on the upper jig and on a positioning plate mounted on the lower jig and, in accordance with the method of the invention, photographs are taken of the reference marks simultaneously with the positioning plate engaging the upper jig. Reference mark alignment is calculated from the photographs and the upper jig is moved horizontally to correct misalignment.
    Type: Grant
    Filed: August 28, 1997
    Date of Patent: November 21, 2000
    Assignee: Nidec Read Corporation
    Inventor: Hideo Nishikawa
  • Patent number: 6049214
    Abstract: An inspection apparatus for determining conductivity between and among inspection points on a printed circuit board. The apparatus comprises a plurality of probes arranged in a predetermined pattern, a translator board including a first set of terminals arranged in the same pattern as that of the probes and a second set of terminals arranged in the same pattern as that of the inspection points on a printed circuit board to be inspected, the first set of terminals being respectively interconnected with corresponding terminals of the second set, the translator board being exchangeably mounted in the apparatus, and interconnecting pins for electrically interconnecting the probes with corresponding terminals of the first set of terminals on the translator board.
    Type: Grant
    Filed: December 5, 1997
    Date of Patent: April 11, 2000
    Assignee: Nidec-Read Corporation
    Inventors: Hideo Nishikawa, Takashi Miki
  • Patent number: D463198
    Type: Grant
    Filed: August 10, 2001
    Date of Patent: September 24, 2002
    Assignee: Nisshin Industry Co., Ltd.
    Inventor: Hideo Nishikawa
  • Patent number: D310764
    Type: Grant
    Filed: August 10, 1988
    Date of Patent: September 25, 1990
    Assignee: Imanishi Kinzoku Kogyo Kabushiki Kaisha
    Inventor: Hideo Nishikawa
  • Patent number: RE46486
    Abstract: A semiconductor pressure sensor includes n-type semiconductor regions, which are formed in a diaphragm of a semiconductor substrate, piezoresistive elements, which are respectively formed in the n-type semiconductor regions, and conductive shielding thin film layers, which are respectively formed on the piezoresistive elements through an insulating thin film layer, and the piezoresistive elements form a Wheatstone bridge circuit. Further, the n-type semiconductor regions and the conductive shielding thin film layers are electrically connected to each other through contacts formed in the diaphragm.
    Type: Grant
    Filed: August 7, 2015
    Date of Patent: July 25, 2017
    Assignee: Panasonic Corporation
    Inventors: Yuichi Niimura, Hideo Nishikawa, Fumihito Kato