Abstract: A frequency synchronization method comprise a first step of detecting a frequency error which occurs when a high-frequency receiving signal is converted into a digital signal of a base-band, performing rounding or discarding processing and generating a local oscillation signal depending on the converted analog signals, a second step of generating a digital signal whose frequency depending on a discard component obtained by the rounding or discarding processing when the rounding or discarding processing is performed, and a third step of canceling a frequency component of the digital signal which is generated by the second step from a frequency component of the digital signal of the base-band.

Abstract: By including plural receiving branches which are independently controllable for use in diversity reception or plural-channel simultaneous reception, a receiving device can be operated both as a diversity receiving device and as a plural-channel simultaneous receiving device.

Abstract: A frequency synchronization method comprise a first step of detecting a frequency error which occurs when a high-frequency receiving signal is converted into a digital signal of a base-band, performing rounding or discarding processing and generating a local oscillation signal depending on the converted analog signals, a second step of generating a digital signal whose frequency depending on a discard component obtained by the rounding or discarding processing when the rounding or discarding processing is performed, and a third step of canceling a frequency component of the digital signal which is generated by the second step from a frequency component of the digital signal of the base-band.

Abstract: By including plural receiving branches which are independently controllable for use in diversity reception or plural-channel simultaneous reception, a receiving device can be operated both as a diversity receiving device and as a plural-channel simultaneous receiving device.

Abstract: A protocol control circuit for a data bus system in which data is communicated through a data bus and an acknowledgement signal is transmitted from a receiving unit through the data bus to a transmitting unit when data from the transmitting unit is received by the receiving unit. The protocol control circuit provides a buffer register unit including: a transmitting buffer register for storing at least one unit for data to be transmitted; an acknowledgement buffer register for storing the acknowledgement signal; and a selector connected to the transmitting buffer register and the acknowledgement buffer register. The selector carries out switching between the transmission of the output signal of the transmitting buffer register and the transmission of the output signal of the acknowledgement buffer register in correspondence with detection of proper timing of delivery of the acknowledgment signal.