Abstract: A method of manufacturing a structure that includes a substrate provided with a through hole, and a resin layer provided on a front surface of the substrate to close the through hole, includes, in order, preparing the substrate including the through hole and including a support substrate on a back surface of the substrate to close the through hole, bonding a dry film to a front surface of the substrate, the dry film including a support member and a resin layer on the support member, to close the through hole with the resin layer and turn the through hole into a closed space with the substrate, the support substrate, and the dry film, opening the through hole turned into the closed space from the support substrate side, and separating the support member from the dry film while retaining the resin layer on the front surface of the substrate.

Abstract: A method of manufacturing a structure that includes a substrate provided with a through hole, and a resin layer provided on a front surface of the substrate to close the through hole, includes, in order, preparing the substrate including the through hole and including a support substrate on a back surface of the substrate to close the through hole, bonding a dry film to a front surface of the substrate, the dry film including a support member and a resin layer on the support member, to close the through hole with the resin layer and turn the through hole into a closed space with the substrate, the support substrate, and the dry film, opening the through hole turned into the closed space from the support substrate side, and separating the support member from the dry film while retaining the resin layer on the front surface of the substrate.

Abstract: A solid-state image sensor includes semiconductor substrate having element forming pixel array and element forming peripheral circuit, and wiring structure. The wiring structure includes electrically conductive pattern arranged in trench of interlayer insulation film and includes primary lines parallel to first direction and auxiliary lines connecting the primary lines. Width of primary line in second direction perpendicular to the first direction is not less than 250 nm and not more than 2,000 nm, interval between adjacent primary lines is not more than 500 nm, width of the auxiliary line in the first direction is less than 400 nm. Value obtained by dividing area of the electrically conductive pattern in square region by area of the square region is not more than 0.9.

Abstract: A step of forming a connecting member configured to electrically connect a first conductive line and a second conductive line includes a phase of perforating a laminate from a first semiconductor wafer to form a plurality of connection holes that reach the second conductive line and a phase of filling the plurality of penetrating connection holes with a conductive material to form conductive sections in contact with the second conductive line.

Abstract: A back-side illumination image capturing apparatus includes a semiconductor substrate having a first surface for receiving incident light and a second surface located on the opposite side as the first surface, and including a photoelectric conversion portion, and a gate electrode disposed above the second surface. The apparatus further includes a first insulating layer disposed above the second surface of the semiconductor substrate, an interlayer insulation film disposed on the first insulating layer, a contact plug connected to the gate electrode, and a light-cutting portion for cutting light, of the incident light, that has passed through the photoelectric conversion portion. The light-cutting portion passes through at least part of the interlayer insulation film. The first insulating layer is located between the light-cutting portion and the semiconductor substrate.

Abstract: An image sensor includes a plurality of pixels. At least a pixel of the plurality of pixels includes a plurality of photoelectric converters arranged in a semiconductor substrate and a light waveguide provided for the plurality of photoelectric converters. The light waveguide includes a main waveguide surrounded by an insulation film so as to pass light entering the plurality of photoelectric converters, and a plurality of sub waveguides each arranged between the main waveguide and a corresponding photoelectric converter of the plurality of photoelectric converters. The plurality of sub waveguides are separated from each other by a separator including an electrically conductive member.

Abstract: A step of forming a connecting member configured to electrically connect a first conductive line and a second conductive line includes a phase of perforating a laminate from a first semiconductor wafer to form a plurality of connection holes that reach the second conductive line and a phase of filling the plurality of penetrating connection holes with a conductive material to form conductive sections in contact with the second conductive line.

Abstract: A solid-state image sensor includes semiconductor substrate having element forming pixel array and element forming peripheral circuit, and wiring structure. The wiring structure includes electrically conductive pattern arranged in trench of interlayer insulation film and includes primary lines parallel to first direction and auxiliary lines connecting the primary lines. Width of primary line in second direction perpendicular to the first direction is not less than 250 nm and not more than 2,000 nm, interval between adjacent primary lines is not more than 500 nm, width of the auxiliary line in the first direction is less than 400 nm. Value obtained by dividing area of the electrically conductive pattern in square region by area of the square region is not more than 0.9.

Abstract: A step of forming a connecting member configured to electrically connect a first conductive line and a second conductive line includes a phase of perforating a laminate from a first semiconductor wafer to form a plurality of connection holes that reach the second conductive line and a phase of filling the plurality of penetrating connection holes with a conductive material to form conductive sections in contact with the second conductive line.

Abstract: Provided is a photoelectric conversion device including: a semiconductor substrate having a photoelectric conversion unit; a first conductive layer formed over the semiconductor substrate; a first diffusion prevention layer formed over the first conductive layer; and a light guide that guides an incident light into the photoelectric conversion unit, in which the first diffusion prevention layer contains hydrogen atoms and carbon atoms, and a composition ratio of the hydrogen atoms is greater than or equal to 46 at % and less than or equal to 50 at %.

Abstract: An image sensor includes a plurality of pixels. At least a pixel of the plurality of pixels includes a plurality of photoelectric converters arranged in a semiconductor substrate and a light waveguide provided for the plurality of photoelectric converters. The light waveguide includes a main waveguide surrounded by an insulation film so as to pass light entering the plurality of photoelectric converters, and a plurality of sub waveguides each arranged between the main waveguide and a corresponding photoelectric converter of the plurality of photoelectric converters. The plurality of sub waveguides are separated from each other by a separator including an electrically conductive member.

Abstract: Provided is a photoelectric conversion device including: a semiconductor substrate having a photoelectric conversion unit; a first conductive layer formed over the semiconductor substrate; a first diffusion prevention layer formed over the first conductive layer; and a light guide that guides an incident light into the photoelectric conversion unit, in which the first diffusion prevention layer contains hydrogen atoms and carbon atoms, and a composition ratio of the hydrogen atoms is greater than or equal to 46 at % and less than or equal to 50 at %.

Abstract: A step of forming a connecting member configured to electrically connect a first conductive line and a second conductive line includes a phase of perforating a laminate from a first semiconductor wafer to form a plurality of connection holes that reach the second conductive line and a phase of filling the plurality of penetrating connection holes with a conductive material to form conductive sections in contact with the second conductive line.

Abstract: A back-side illumination image capturing apparatus includes a semiconductor substrate having a first surface for receiving incident light and a second surface located on the opposite side as the first surface, and including a photoelectric conversion portion, and a gate electrode disposed above the second surface. The apparatus further includes a first insulating layer disposed above the second surface of the semiconductor substrate, an interlayer insulation film disposed on the first insulating layer, a contact plug connected to the gate electrode, and a light-cutting portion for cutting light, of the incident light, that has passed through the photoelectric conversion portion. The light-cutting portion passes through at least part of the interlayer insulation film. The first insulating layer is located between the light-cutting portion and the semiconductor substrate.

Abstract: A step of forming a connecting member configured to electrically connect a first conductive line and a second conductive line includes a phase of perforating a laminate from a first semiconductor wafer to form a plurality of connection holes that reach the second conductive line and a phase of filling the plurality of penetrating connection holes with a conductive material to form conductive sections in contact with the second conductive line.

Abstract: A back-side illumination image capturing apparatus includes a semiconductor substrate having a first surface for receiving incident light and a second surface located on the opposite side as the first surface, and including a photoelectric conversion portion, and a gate electrode disposed above the second surface. The apparatus further includes a first insulating layer disposed above the second surface of the semiconductor substrate, an interlayer insulation film disposed on the first insulating layer, a contact plug connected to the gate electrode, and a light-cutting portion for cutting light, of the incident light, that has passed through the photoelectric conversion portion. The light-cutting portion passes through at least part of the interlayer insulation film. The first insulating layer is located between the light-cutting portion and the semiconductor substrate.

Abstract: A method of manufacturing a junction field effect transistor having a channel region disposed in a semiconductor substrate, deeper than one of a source region and a drain region, the method includes a first step of forming a first mask having a first opening portion over the semiconductor substrate in which a first semiconductor region of a first conductivity type is disposed, a second step of forming a second semiconductor region of a second conductivity type defined as the channel region, in the first semiconductor region by implantation of ions of second conductivity type opposite to the first conductivity type using the first mask, and a third step of forming a third semiconductor region of the second conductivity type defined as the one of the source region and the drain region, by implantation of ions of the second conductivity type, using the first mask.

Abstract: A method includes the steps of: forming a plurality of recessed portions in an insulating film formed above a wafer including a first region and a second region outside the first region such that the recessed portions are formed above both the first region and the second region; forming a conductive film on the insulating film such that the plurality of recessed portions are filled with the conductive film; removing the conductive film above the second region while leaving the conductive film above the first region; and removing part of the conductive film remaining above the first region outside the plurality of recessed portions, wherein an area proportion of the recessed portions each having a projected area of 10 ?m2 or smaller on the wafer among the plurality of recessed portions is higher in the second region than in the first region.

Abstract: A junction type field effect transistor (JFET) in a substrate includes channel and source regions of a first conductivity type and first through fourth gate regions of a second conductivity type. The first and second gate regions are disposed in a direction along a surface of the substrate. The third and fourth gate regions are disposed in the direction. The first and third gate regions are disposed in a depth direction. The first gate region is disposed between the surface and the third gate region. The second and fourth gate regions are disposed in the depth direction. The second gate region is disposed between the surface and the fourth gate region. The channel region includes a first region disposed between the first and third gate regions and a second region disposed between the second and fourth gate regions. The source region is disposed between the first and second gate regions.

Abstract: A step of forming a connecting member configured to electrically connect a first conductive line and a second conductive line includes a phase of perforating a laminate from a first semiconductor wafer to form a plurality of connection holes that reach the second conductive line and a phase of filling the plurality of penetrating connection holes with a conductive material to form conductive sections in contact with the second conductive line.