Patents by Inventor Hidesato Matsuoka

Hidesato Matsuoka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7184947
    Abstract: A document anonymity setting device comprises a document input means inputting a document, a specificity calculating means extracting an expression specifying a person from the input document and for calculating a specificity to evaluate a degree of specificity at which the expression specifying a person, and an anonymity setting processing means rewriting with anonymity setting a expression in the input document having a specificity which is greater than a predetermined threshold. The specificity calculating unit extracts a person name and a modification expression from the input document and calculates a specificity to evaluate a degree of specificity at which the person name and modification expression thus extracted can specify a person.
    Type: Grant
    Filed: August 6, 2001
    Date of Patent: February 27, 2007
    Assignee: Fujitsu Limited
    Inventors: Hidesato Matsuoka, Ryo Ochitani
  • Publication number: 20020091516
    Abstract: A document anonymity setting device comprises a document input means inputting a document, a specificity calculating means extracting an expression specifying a person from the input document and for calculating a specificity to evaluate a degree of specificity at which the expression specifying a person, and an anonymity setting processing means rewriting with anonymity setting a expression in the input document having a specificity which is greater than a predetermined threshold. The specificity calculating unit extracts a person name and a modification expression from the input document and calculates a specificity to evaluate a degree of specificity at which the person name and modification expression thus extracted can specify a person.
    Type: Application
    Filed: August 6, 2001
    Publication date: July 11, 2002
    Applicant: FUJITSU LIMITED
    Inventors: Hidesato Matsuoka, Ryo Ochitani
  • Patent number: 5322589
    Abstract: A process for recrystallizing a semiconductor layer including the steps of forming a polycrystalline or amorphous semiconductor layer on a substrate and scanning energy beam on the semiconductor layer, wherein the energy beam is vibrated substantially in parallel to the direction of advance of the scanning of the energy beam. For carrying out the process, the apparatus includes a sample stage for holding a sample having a polycrystalline or amorphous semiconductor layer, an energy beam source for generating energy beam, a scanning means for scanning the energy beam on the semiconductor layer, and a beam-vibrating means for vibrating the energy beam substantially in parallel to the direction of advance of the scanning of the energy beam.
    Type: Grant
    Filed: April 21, 1993
    Date of Patent: June 21, 1994
    Assignee: Fujitsu Limited
    Inventors: Hidesato Matsuoka, Kazuo Hashimi