Patents by Inventor Hideshi Kawasaki

Hideshi Kawasaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9530692
    Abstract: Provided is a method of forming a through wiring, including forming a first insulating film on a first surface and a second surface of a substrate; forming a through hole to pass through the first insulating film formed on the first surface side and the substrate; forming a second insulating film formed from a material different from that of the first insulating film on an inner wall of the through hole; forming a conductive film on the first insulating film formed on the second surface; forming an opening in the first insulating film by processing the first insulating film formed on the second surface; and filling an inner portion of the through hole with a conductive material by electrolytic plating using the conductive film exposed at the bottom portion of the through hole as a seed layer.
    Type: Grant
    Filed: February 9, 2015
    Date of Patent: December 27, 2016
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Shinan Wang, Hideshi Kawasaki
  • Publication number: 20150235899
    Abstract: Provided is a method of forming a through wiring, including forming a first insulating film on a first surface and a second surface of a substrate; forming a through hole to pass through the first insulating film formed on the first surface side and the substrate; forming a second insulating film formed from a material different from that of the first insulating film on an inner wall of the through hole; forming a conductive film on the first insulating film formed on the second surface; forming an opening in the first insulating film by processing the first insulating film formed on the second surface; and filling an inner portion of the through hole with a conductive material by electrolytic plating using the conductive film exposed at the bottom portion of the through hole as a seed layer.
    Type: Application
    Filed: February 9, 2015
    Publication date: August 20, 2015
    Inventors: Shinan Wang, Hideshi Kawasaki
  • Publication number: 20100060141
    Abstract: In an electron beam device employing an electron-emitting device in which a gate and a cathode are provided to sandwich a recess portion formed on an insulating member, electrons are scattered after the collision against the gate and then extracted, it is made possible to easily obtain stable electron emission characteristics and also to prevent the electron-emitting device from being deteriorated or being fractured due to overheating even when an excessive heat has been generated. The electron-emitting device includes the cathode having a protrusion 30 positioned astride the outer surface of the insulating member and the inner surface of the recess portion formed in the insulating member, and the gate including a layered structure of at least two electroconductive layers. A thermal expansion coefficient of the electroconductive layer which is arranged at a part facing to the protrusion is larger than that of the other electroconductive layer.
    Type: Application
    Filed: September 3, 2009
    Publication date: March 11, 2010
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Ouichi Kubota, Noritake Suzuki, Hideshi Kawasaki, Tamaki Kobayashi, Toshihiko Takeda
  • Patent number: 7189427
    Abstract: This invention provides an electron source manufacturing apparatus which can be easily downsized and operated. The electron source manufacturing apparatus includes a support member for supporting a substrate (10) having a conductor (11), a vessel (12) which has a gas inlet port (15) and a gas exhaust port (16) and covers a partial region of the surface of the substrate (10); a gas inlet unit (24) connected to the gas inlet port (15) to introduce gas into the vessel, an exhaust unit (26) connected to the gas exhaust port to evacuate the interior of the vessel, and a voltage application unit (32) for applying a voltage to the conductor.
    Type: Grant
    Filed: February 10, 2004
    Date of Patent: March 13, 2007
    Assignee: Canon Kabushiki Kaisha
    Inventors: Toshihiko Takeda, Masaru Kamio, Masataka Yamashita, Yasue Sato, Hitoshi Oda, Keisuke Yamamoto, Miki Tamura, Hideshi Kawasaki, Kazuhiro Jindai
  • Patent number: 6878027
    Abstract: A method for producing an electron source in which plural electron emission devices are connected in a matrix by plural row wirings and plural column wirings, the row wirings of a number m(=a×b×c) are divided into groups G1 to Ga of a number a, and the row wirings in each group are divided into sub groups SG1 to SGb of a number b, each containing the row wirings of a number c. The deposition process is executed by voltage application by selecting the row wirings of SG1 in succession and commonly to all the groups, and such deposition process is thereafter similarly executed on the sub groups starting from SG2, whereby the deposition process for all the elements is executed by executing the deposition process for each sub group by b times.
    Type: Grant
    Filed: February 24, 2000
    Date of Patent: April 12, 2005
    Assignee: Canon Kabushiki Kaisha
    Inventor: Hideshi Kawasaki
  • Patent number: 6822397
    Abstract: The present invention relates to the adjustment of luminance. The present invention is a method of manufacturing image forming apparatus including a step of applying characteristic shift voltage comprising a plurality of pulses in which the amplitude of the pulse obtained from the look-up table has two or more values, to the emitter, the look-up table storing the amplitude of the pulse and the number of the pulse for shifting characteristic of emitters to a predetermined luminance target value on the basis of the measurement result of the luminance. Moreover, the present invention is a method of manufacturing image forming apparatus comprising a step of applying the second pulses of characteristic shift voltage having the amplitude which was determined in response to the measurement result of the luminance after the first characteristic shift voltage had been applied to the emitter.
    Type: Grant
    Filed: May 6, 2003
    Date of Patent: November 23, 2004
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hideshi Kawasaki, Shuji Aoki, Izumi Tabata, Akihiko Yamano, Hisashi Sakata
  • Patent number: 6802753
    Abstract: In a manufacturing process of an image forming apparatus (electron beam device) using electron emission elements, particularly, surface conduction type electron emission elements, wirings on an electron source substrate on which the wirings and element electrodes are formed are opposite to electrodes for a face plate, and a given voltage is applied between the wirings and the electrodes to thereby generate a discharge phenomenon in advance, thus removing a protrusion or the like. In this way, when an electric field applying process is conducted on the electron source substrate, a factor such as a protrusion in an electron source which induces a discharge phenomenon in driving an electron beam device represented by an image forming apparatus is removed, thus realizing an image forming apparatus excellent in display characteristic with no defective pixel even in image display for a long period of time.
    Type: Grant
    Filed: November 28, 2000
    Date of Patent: October 12, 2004
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yoichi Ando, Keisuke Yamamoto, Hideshi Kawasaki, Tamaki Kobayashi, Satoshi Mogi, Akira Hayama
  • Publication number: 20040154545
    Abstract: This invention provides an electron source manufacturing apparatus which can be easily downsized and operated. The electron source manufacturing apparatus includes a support member for supporting a substrate (10) having a conductor (11), a vessel (12) which has a gas inlet port (15) and a gas exhaust port (16) and covers a partial region of the surface of the substrate (10); a gas inlet unit (24) connected to the gas inlet port (15) to introduce gas into the vessel, an exhaust unit (26) connected to the gas exhaust port to evacuate the interior of the vessel, and a voltage application unit (32) for applying a voltage to the conductor.
    Type: Application
    Filed: February 10, 2004
    Publication date: August 12, 2004
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Toshihiko Takeda, Masaru Kamio, Masataka Yamashita, Yasue Sato, Hitoshi Oda, Keisuke Yamamoto, Miki Tamura, Hideshi Kawasaki, Kazuhiro Jindai
  • Patent number: 6726520
    Abstract: This invention provides an electron source manufacturing apparatus which can be easily downsized and operated. The electron source manufacturing apparatus includes a support member for supporting a substrate (10) having a conductor (11), a vessel (12) which has a gas inlet port (15) and a gas exhaust port (16) and covers a partial region of the surface of the substrate (10); a gas inlet unit (24) connected to the gas inlet port (15) to introduce gas into the vessel, an exhaust unit (26) connected to the gas exhaust port to evacuate the interior of the vessel, and a voltage application unit (32) for applying a voltage to the conductor.
    Type: Grant
    Filed: February 21, 2001
    Date of Patent: April 27, 2004
    Assignee: Canon Kabushiki Kaisha
    Inventors: Toshihiko Takeda, Masaru Kamio, Masataka Yamashita, Yasue Sato, Hitoshi Oda, Keisuke Yamamoto, Miki Tamura, Hideshi Kawasaki, Kazuhiro Jindai
  • Publication number: 20040034487
    Abstract: The present invention relates to the adjustment of luminance. The present invention is a method of manufacturing image forming apparatus including a step of applying characteristic shift voltage comprising a plurality of pulses in which the amplitude of the pulse obtained from the look-up table has two or more values, to the emitter, the look-up table storing the amplitude of the pulse and the number of the pulse for shifting characteristic of emitters to a predetermined luminance target value on the basis of the measurement result of the luminance. Moreover, the present invention is a method of manufacturing image forming apparatus comprising a step of applying the second pulses of characteristic shift voltage having the amplitude which was determined in response to the measurement result of the luminance after the first characteristic shift voltage had been applied to the emitter.
    Type: Application
    Filed: May 6, 2003
    Publication date: February 19, 2004
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Hideshi Kawasaki, Shuji Aoki, Izumi Tabata, Akihiko Yamano, Hisashi Sakata
  • Patent number: 6409566
    Abstract: An electron source comprises a substrate, at least one row-directional wire, at least one column-directional wire intersecting the row-directional wire, at least one insulation layer arranged at the intersection of the row-directional wire and the column-directional wire, and at least one conductive film having an electron-emitting region also arranged at the intersection. The insulation layer is arranged between the row-directional wire and the column-directional wire and the conductive film is connected to both wires.
    Type: Grant
    Filed: September 5, 2001
    Date of Patent: June 25, 2002
    Assignee: Canon Kabushiki Kaisha
    Inventors: Mitsutoshi Hasegawa, Yoshiyuki Osada, Hisaaki Kawade, Yuji Kasanuki, Hideshi Kawasaki, Yoshimasa Okamura
  • Publication number: 20020021083
    Abstract: An electron source comprises a substrate, at least one row-directional wire, at least one column-directional wire intersecting the row-directional wire, at least one insulation layer arranged at the crossing(s) of the at least one row-directional wire and the at least one column-directional wire, and at least one conductive film having an electron-emitting region also arranged at the crossing(s). The insulation layer is arranged between the row-directional wire and the column-directional wire and the conductive film is connected to both the wires.
    Type: Application
    Filed: September 5, 2001
    Publication date: February 21, 2002
    Inventors: Mitsutoshi Hasegawa, Yoshiyuki Osada, Hisaaki Kawade, Yuji Kasanuki, Hideshi Kawasaki, Yoshimasa Okamura
  • Patent number: 6313571
    Abstract: An electron source comprises a substrate, at least one row-directional wire, at least one column-directional wire intersecting the row-directional wire, at least one insulation layer arranged at the intersection of the row-directional wire and the column-directional wire, and at least one conductive film having an electron-emitting region also arranged at the intersection. The insulation layer is arranged between the row-directional wire and the column-directional wire and the conductive film is connected to both wires.
    Type: Grant
    Filed: March 24, 1999
    Date of Patent: November 6, 2001
    Assignee: Canon Kabushiki Kaisha
    Inventors: Mitsutoshi Hasegawa, Yoshiyuki Osada, Hisaaki Kawade, Yuji Kasanuki, Hideshi Kawasaki, Yoshimasa Okamura
  • Publication number: 20010036682
    Abstract: This invention provides an electron source manufacturing apparatus which can be easily downsized and operated. The electron source manufacturing apparatus includes a support member for supporting a substrate (10) having a conductor (11), a vessel (12) which has a gas inlet port (15) and a gas exhaust port (16) and covers a partial region of the surface of the substrate (10); a gas inlet unit (24) connected to the gas inlet port (15) to introduce gas into the vessel, an exhaust unit (26) connected to the gas exhaust port to evacuate the interior of the vessel, and a voltage application unit (32) for applying a voltage to the conductor.
    Type: Application
    Filed: February 21, 2001
    Publication date: November 1, 2001
    Inventors: Toshihiko Takeda, Masaru Kamio, Masataka Yamashita, Yasue Sato, Hitoshi Oda, Keisuke Yamamoto, Miki Tamura, Hideshi Kawasaki, Kazuhiro Jindai
  • Patent number: 5912531
    Abstract: An electron source comprises a substrate, at least one row-directional wire, at least one column-directional wire intersecting the row-directional wire, at least one insulation layer arranged at the intersection of the at least one row-directional wire and the column-directional wire, and at least one conductive film having an electron-emitting region also arranged at the intersection. The insulation layer is arranged between the row-directional wire and the column-directional wire and the conductive film is connected to both wires.
    Type: Grant
    Filed: August 5, 1997
    Date of Patent: June 15, 1999
    Assignee: Canon Kabushiki Kaisha
    Inventors: Mitsutoshi Hasegawa, Yoshiyuki Osada, Hisaaki Kawade, Yuji Kasanuki, Hideshi Kawasaki, Yoshimasa Okamura
  • Patent number: 5659184
    Abstract: A III-V compound semiconductor device comprises the use of a compound semiconductor of groups III-V of the periodic table with a polycrystalline structure of an average grain size of 0.6 .mu.m or larger.
    Type: Grant
    Filed: June 20, 1994
    Date of Patent: August 19, 1997
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroyuki Tokunaga, Hideshi Kawasaki
  • Patent number: 5602057
    Abstract: A semiconductor device includes a substrate, a recess formed on the substrate, a first conductive type semiconductor region and a second conductive type semiconductor region having an opposite conductive type to the first conductive type formed in the recess formed on the substrate, and wiring portions, wherein the surfaces of the substrate, the first conductive type semiconductor region and the second conductive type semiconductor region and are continuously on one plane, and the wiring portions connected respectively to the first conductive type semiconductor region and the second conductive type semiconductor region are formed on and in contact with the plane and are all substantially on the same plane and electrically independent from each other.
    Type: Grant
    Filed: February 27, 1995
    Date of Patent: February 11, 1997
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hideshi Kawasaki, Hiroyuki Tokunaga
  • Patent number: 5548131
    Abstract: A light-emitting device formed by applying a crystal formation process to a substrate with a free surface on which provided, in mutually adjacent manner, are a non-nucleation surface and a nucleation surface with a nucleation density larger than that of the non-nucleation surface, wherein the nucleation surface is provided in an oblong form.
    Type: Grant
    Filed: September 12, 1994
    Date of Patent: August 20, 1996
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroyuki Tokunaga, Hideshi Kawasaki
  • Patent number: 5369290
    Abstract: A light emission element using a plycrystalline semiconductor material of III-V group compound comprises an n type semiconductor polycrystalline layer and a p type semiconductor polycrystalline layer. In such a light emission element, the n type semiconductor polycrystalline layer and the p type semiconductor polycrystalline layer comprise a light emitting area formed by polycrystals having the average grain size of 0.6 .mu.m or more, and a wiring area formed by polycrystals having the average grain size of 0.5 .mu.m or less. Hence, the light emission efficiency is enhanced as well as improving the reliability of the element.
    Type: Grant
    Filed: April 22, 1992
    Date of Patent: November 29, 1994
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hideshi Kawasaki, Hiroyuki Tokunaga
  • Patent number: 5243200
    Abstract: A semiconductor device comprises a substrate, a recess formed on the substrate, a first conductive type semiconductor region and a second conductive type semiconductor region having an opposite conductive type to the first conductive type formed in the recess formed on the substrate, and wiring portions, wherein the surfaces of the substrate, the first conductive type semiconductor region and the second conductive type semiconductor region and are continuously on one plane, and the wiring portions connected respectively to the first conductive type semiconductor region and the second conductive type semiconductor region are formed on and in contact with the plane and are all substantially on the same plane and electrically independent from each other.
    Type: Grant
    Filed: November 21, 1991
    Date of Patent: September 7, 1993
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hideshi Kawasaki, Hiroyuki Tokunaga